151 results about "Cell resistance" patented technology

A system and a method for computing an estimated state of charge and an estimated cell resistance of an electrochemical cell are provided. The method includes predicting a first cell resistance value indicating a present resistance of the electrochemical cell utilizing a first nonlinear cell model. The method further includes predicting a first state of charge value indicating a present state of charge of the electrochemical cell utilizing a second nonlinear cell model. The method further includes measuring a voltage and, a current associated with the electrochemical cell to obtain a voltage value and a current value, respectively. The method further includes estimating a second state of charge value indicating the present state of charge of the electrochemical cell utilizing the second nonlinear cell model based on the first state of charge value, the first cell resistance value, the voltage value, and the current value. The method further includes estimating a second cell resistance value indicating the present resistance of the electrochemical cell utilizing the first nonlinear cell model based on the first cell resistance value, the first state of charge value, the voltage value, and the current value.

Self-reference reading a magnetic tunnel junction data cell methods are disclosed. An illustrative method includes applying a read voltage across a magnetic tunnel junction data cell and forming a read current. The magnetic tunnel junction data cell has a first resistance state. The read voltage is sufficient to switch the magnetic tunnel junction data cell resistance. The method includes detecting the read current and determining if the read current remains constant during the applying step. If the read current remains constant during the applying step, then the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read voltage was sufficient to switch the magnetic tunnel junction data cell to.

Systems and methods employing at least one constant current source to facilitate programming of an organic memory cell and / or employing at least one constant voltage source to facilitate erasing of a memory device. The present invention is utilized in single memory cell devices and memory cell arrays. Employing a constant current source prevents current spikes during programming and allows accurate control of a memory cell's state during write cycles, independent of the cell's resistance. Employing a constant voltage source provides a stable load for memory cells during erase cycles and allows for accurate voltage control across the memory cell despite large dynamic changes in cell resistance during the process.

Magneto-resistive memory bit cells in an array have high or low resistance states storing logic values. During read operations, a bias source is coupled to an addressed memory word, coupling a parameter related to cell resistance to a sense amplifier at each bit position. The sense amplifiers determine whether the parameter value is greater or less than a reference value between the high and low resistance states. The reference value is derived by averaging or splitting a difference of resistances of reference cells at high and / or low resistance states. Bias current is conducted over address lines with varying resistance, due to different distances between the sense amplifiers and addressed memory words, which is canceled by inserting into the comparison circuit a resistance from a dummy addressing array, equal to the resistance of the conductor addressing the selected word line and bit position.

In a spray pyrolysis manufacturing method of an all-solid-state film lithium ion battery, a double-layer film structure is formed by depositing an anode material and a solid electrolyte together, and two layers of precursor solutions are sprayed simultaneously at a junction part of a anode solid electrolyte layer and a cathode layer by a double spray gun so as to form a buffer layer. The invention is characterized in that an interface layer between films is reduced; not only the battery resistance is reduced, but also the ionic conductivity of the anode material is increased; in the buffer layer between two deposition layers, the component contents of the two layers change gradually; the component content of the lower layer decreases gradually, and the component content of the upper layer increases gradually. Therefore, tight combination of the upper and the lower layers is formed; the compatibility of the upper and the lower layers is improved; the stress and crystal boundary are decreased; and the interfacial conductivity is increased; the conductivity of the whole all-solid-state film battery is greatly improved, and the stability and cycling performance of the battery are improved.