11 results about "Chip operating system" patented technology

The invention discloses a realization method and system for a domestic environment-oriented MBSE collaborative modeling platform architecture. The method comprises the following steps: constructing a distributed operation environment adaptive to a domestic chip, an operation system and a database based on a micro-service architecture; deploying a modeling engine, cooperative control and data persistence micro-service; multi-user operation requests are received through cooperative control micro-service, conflict detection and coordination are carried out by using an operation transformation algorithm based on a vector clock and a priority decision function, and a global ordered operation sequence is generated; executing the sequence through a modeling engine to update a model state and perform consistency verification; storing the model state and the historical record to a domestic database by using a data persistence micro-service; a bidirectional traceability matrix is constructed through demand influence degree analysis based on a graph neural network. According to the method, the problems of MBSE tool missing, low collaboration efficiency and data isolated island in a localized environment are solved, and safe and controllable efficient collaboration design and full-life-cycle management are realized.

The invention discloses a near field communication routing method and device, a storage medium and electronic equipment, and relates to the technical field of terminals, and the method can establish a secure communication link, and obtains a card application list through the secure communication link. And writing the routing data of the card application list into a routing table of the near field communication or a chip operating system of the embedded universal integrated circuit card so as to configure the routing of the near field communication. Wherein the secure communication link is established and generated based on the trusted service management platform and an embedded universal integrated circuit card of the terminal equipment. By applying the technical scheme of the invention, the routing data of the near field communication is written into the near field communication routing table or the chip operating system, accurate routing configuration can be realized, and routing conflicts in a multi-activation configuration file scene are solved, so that the accuracy and flexibility of the near field communication routing and the system security are improved, and the user experience is improved.

A WAPI terminal security certificate system implementation method is composed of a terminal STA, an access terminal AP and an authentication server AS, wherein the AP is a standard device, the terminal STA is additionally provided with a security chip, the security chip runs an on-chip operating system (COS) program and interacts with the terminal main chip, a corresponding WAPI certificate management program and a WAPI connection program are run on the terminal, the WAPI certificate management, authentication and WAPI connection establishment are realized through the interaction between the programs and the authentication server, and finally the WAPI communication is realized; through the interaction between the security chip and the terminal main chip, the WAPI certificate issuance and certificate authentication are realized, and the security of the WAPI certificate can be ensured by using the characteristics that the security chip data is difficult to steal.

The invention relates to the technical field of security and credibility, and discloses a power distribution type adjustable resource security access terminal, method, device and medium, the terminal comprises a security and credibility chip, a storage chip, a communication chip, an operating system and a communication protocol stack, and the operating system comprises a probe; the secure trusted chip controls the communication chip to be powered on in a delayed manner, reads the software mirror image file of the storage chip, performs trusted authentication, and controls the communication chip to be powered on when a trusted authentication result is that the software mirror image file passes the trusted authentication; the probe monitors the operation states of the operation system and the communication protocol stack; and the communication chip initiates identity verification to the power master station system when the probe does not monitor the abnormal operation state, and accesses the power master station system after passing the identity verification. According to the invention, the security and credibility chip is configured in the terminal, credibility authentication is carried out by using the security and credibility chip, identity verification between the terminal and the power master station system is realized through the communication chip, security access of distributed adjustable resources is realized, and the security and credibility requirements of a power grid on access equipment are met.

The invention provides a method for native compilation and deployment of a time sequence interference radar processing tool chain ISCE2 and MintPy on a domestic ARM architecture. Aiming at three bottlenecks of poor compilation compatibility, difficulty in dependency library collaboration and huge virtualization computing power loss faced by migration from x86 to ARM architecture, the method eliminates nonstandard path hard coding errors through a dynamic path repair mechanism, establishes a hybrid dependency scheduling system, solves symbol conflicts and ABI incompatibility, and deeply optimizes an instruction set to realize performance maximization. Through strict verification, the compiling success rate is remarkably improved to 100% from less than 50%, the computing power utilization rate reaches 100%, the global first set of full-function ARM time sequence InSAR processing system is successfully constructed, and the performance approaches or even exceeds that of an x86 platform under the same hardware scale. The method is completely based on an open source scientific calculation library, the commercial authorization cost is avoided, a full-stack localization technical chain from a chip, an operating system to application software is realized, and important localization technical support and diversified selection are provided for satellite remote sensing deformation monitoring and geological disaster early warning.

The invention discloses a multi-mode intelligent testing system and method for a computer. The multi-mode intelligent testing system comprises a hardware adaptation layer, an intelligent testing layer and a result analysis layer which are connected in sequence. The hardware adaptation layer is used for identifying and adapting to target computers of different architectures, generating and applying a simulation load, and collecting operation state data of the simulation load at the same time. And the intelligent test layer generates a multi-dimensional test case by utilizing the generative AI based on the hardware architecture information, schedules and executes performance, compatibility and security parallel tests, and generates test result data according to the running state data. And the result analysis layer fuses the test results, calculates a comprehensive score, positions a problem through analysis result data and state data, and generates a visual report. Automatic and intelligent testing and deep analysis of a chip-operating system-application full-stack link of a domestic computer are realized, and the problems of incomplete testing coverage, low efficiency and single dimension of the domestic computer are effectively solved.

The application discloses a kind of NVMeoF computing node virtualization methods based on intermediate transparent transmission, it is related to cloud computing technology field.The high concurrency implementation in virtual machine NVMe driver is multiplexed in the present application, without modifying virtual machine NVMe driver, with better transparency, and with higher performance;By introducing NVMeoF intermediate layer transparent transmission NVMe device, the discovery and connection of NVMeoF are executed by cloud service provider, and cloud tenant can directly use the unmodified virtual machine NVMe driver in virtual machine to complete various requests, without manually configuring the discovery and connection of NVMeoF, convenient to use, and the storage node of cloud service provider cannot be directly accessed by malicious cloud tenant;NVMeoF intermediate layer is realized by software, without requiring network card to have NVMe hardware interface, and NVMeoF intermediate layer works in host operating system, without using on-chip operating system in intelligent network card, with lower cost and easy to maintain.

The invention discloses an open-type architecture on-chip operating system based on SeHAL and a management method of the open-type architecture on-chip operating system based on SeHAL. The system comprises a system base used for hardware initialization and driving; the security hardware abstraction layer is used for providing a unified standardized hardware interface, application loading management and maintenance of an application index list for an upper layer; and at least one application module which can be independently compiled and loaded. Hardware isomerism is shielded through SeHAL, flexible registration and routing of applications are realized in combination with a structured application index list, and application modules can be dynamically loaded and managed in an independent and safe manner, so that multi-application flexible support and cross-platform deployment capability comparable to Java COS are obtained while high efficiency and light weight of Native COS are kept, and the method has the advantages of being high in practicability and easy to popularize. And the adaptability and the development efficiency of the security chip in a complex multi-service scene are remarkably improved.

The invention provides an acquisition terminal operating system compatible with main control chips of different architectures, solves the problems of high version management cost, limited chip type selection and lack of a unified basic service module caused by a traditional mode of one core and one system, and realizes seamless operation of the operating system on multiple types of main control chips. The system comprises a hardware layer which is used for providing hardware resources and comprises a main control chip supporting a plurality of different architectures; the operating system layer is located on the hardware layer and used for managing hardware resources and providing a running environment for the application layer, and the operating system layer comprises a bootstrap program which comprises a preloading program module and further comprises a universal bootstrap program module; and a drive program, a hardware abstraction layer, a system kernel, a root file system and a system component. And the application layer is positioned on the operating system layer and is used for executing a terminal acquisition task and upper-layer application logic and accessing resources provided by the operating system layer through a system calling interface.

The invention provides an intelligent visual SoC chip operating system starting method and device and a medium, and relates to the technical field of visual SoC chip operating systems, and the method comprises the steps: starting a bootstrap program built in a chip after the intelligent visual SoC chip is powered on; hardware adaptation detection is executed through the bootstrap program; calling a starting configuration file matched with the current chip from a preset hardware adaptation library; preferentially loading an operating system kernel and an intelligent vision dedicated drive module according to a module loading priority in the startup configuration file; after loading of the operating system kernel and the special driving module is completed, targeted initialization of the exclusive visual processing component is executed; loading a core service and visual application basic module, and completing the starting of an intelligent visual SoC chip operating system; customized and efficient starting of the intelligent visual SoC chip operating system is achieved, and the starting performance, the hardware adaptation capacity and the visual processing supporting effect of the chip are comprehensively optimized.

The invention discloses an agricultural machinery centralized controller hardware system based on heterogeneous double chips, which is particularly suitable for intelligent new energy agricultural machinery, a hardware interface can meet the intelligent and electric requirements of the agricultural machinery, and the hardware system comprises the heterogeneous double chips based on an ARM architecture and an AURIX architecture; the double-chip operating system adopts a LINUX operating system and an ERIKA operating system respectively; the MPU is responsible for sensing a related sensor, the MCU is responsible for controlling a related actuator by a vehicle, and the MPU and the MCU communicate with each other through an Ethernet gateway, GPIO and SPI; the system is compatible with interfaces of Ethernet, CAN, IIC, UART, USB, RS485, WIFI, Bluetooth, SD card and the like, and is suitable for integration of application scene control schemes; a DCDC module is adopted as a power supply, a wide-range input power supply is adapted, and the requirements of a control system sensor or an execution device are met. According to the method, the problems of insufficient computing power, safety redundancy deficiency and poor expansibility of a traditional scheme are solved, high-reliability and strong-expansibility core control hardware is provided for the intelligent new energy agricultural machinery, and the automation level of agricultural machinery operation is remarkably improved.