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484 results about "Failure detector" patented technology

In a distributed computing system, a failure detector is a computer application or a subsystem that is responsible for the detection of node failures or crashes. Failure detectors were first introduced in 1996 by Chandra and Toueg in their book Unreliable Failure Detectors for Reliable Distributed Systems. The book depicts the failure detector as a tool to improve consensus (the achievement of reliability) and atomic broadcast (the same sequence of messages) in the distributed system. In other word, failure detectors seek for errors in the process, and the system will maintain a level of reliability. In practice, after failure detectors spot crashes, the system will ban the processes that are making mistakes to prevent any further serious crashes or errors.

Fault tolerant shared system resource with communications passthrough providing high availability communications

A communications passthrough mechanism for high availability network communications between a shared system resource and clients of the system resource. The system resource includes a control/processing sub-system including multiple peer blade processors. A port of each blade processor is connected to each client/server network path and each client is connected to a corresponding port of each blade processor. Each blade processor includes a network fault detector exchanging beacon transmissions with other blade processors through corresponding blade processor ports and network paths. Each blade processor includes response generator responsive to a failure to receive a beacon transmission from a failed port of an other blade processor for redirecting the client communications to the failed port on the other blade processor to the corresponding port of the blade processor. A path manager in the blade processor is responsive to operation of the response generator for modifying the communications routing table to correspond with the redirection message to route the client communications to the failed port of the other blade processor to the other blade processor through the inter-processor communications link. Each blade processor may also include an inter-blade communications monitor for detecting a failure in the inter-processor communications link between the blade processor and another blade processor, reading the communications routing table to select a functional network communications path to a port of the other blade processor, and modifying the communications routing table to redirect inter-processor communications to the selected functional network communications path.
Owner:EMC CORP

Electrical wiring device with protective features

The present invention is directed to an electrical wiring device for use in an electrical distribution system. The device includes a plurality of line terminals configured to terminate the plurality of line conductors and a plurality of load terminals configured to terminate the plurality of load conductors. The protective circuit assembly includes at least one fault detector configured to generate a fault detection signal based on electrical perturbations propagating on at least one of the plurality of line terminals or at least one of the plurality of load terminals. A device integrity evaluation circuit includes a timing circuit coupled to the source of AC power by way of the plurality of load terminals and configured to generate a time measurement. The device integrity evaluation circuit is configured to reset the time measurement if the protective circuit assembly generates the fault detection signal during a predetermined test interval in the properly wired condition. The device integrity evaluation circuit is configured to generate a device integrity fault signal when the time measurement exceeds a predetermined threshold. A circuit interrupter assembly includes movable contacts configured to be latched into a reset state in response to a reset stimulus. The movable contacts are configured to be driven into a tripped state in response to the fault detection signal or the device integrity fault signal.
Owner:PASS SEYMOUR

Protection system for protecting a poly-phase distribution transformer insulated in a liquid dielectric, the system including at least one phase disconnector switch

The distribution transformer is installed in a station having N phases, at least N-1 phases being equipped on the high-voltage side of the transformer with respective current-limiting fuses capable of blowing in the event of a dead short circuit between the phases. The protection system includes: at least one fault detector for detecting faults on the basis of at least one of the following indicators: pressure in the tank, level of the dielectric, or temperature of the transformer; a short-circuiter acting on all the phases situated upstream from the high-voltage windings, said short-circuiter being capable of being triggered by said fault detector to establish a dead short circuit between the phases; and on at least N-1 phases, a detector for detecting an abnormal current upstream from the transformer, said detector being associated with a controller for controlling said short-circuiter. In the system, at least the phase that is not equipped with a limiting fuse is equipped with a disconnector switch which is normally closed in the absence of any fault, said disconnector switch being disposed on the high-voltage side of the transformer upstream from the short-circuiter, and opening thereof being triggered by the short-circuiter in the event of a fault, but with a certain delay.
Owner:AREVA T&D

Method for ensuring fault isolation of virtual machines of cache-aware multi-core processor

The invention relates to the system-level virtual technology and the virtual machine scheduling technology on a multi-core processor in the field of computer system structures and discloses a method for ensuring fault isolation of virtual machines of a cache-aware multi-core processor. The method comprises the steps of: carrying out state abnormity monitoring and heartbeat information detection on all the running virtual machines by a fault detector; when detecting an abnormal virtual machine, firstly recording the distribution condition of the fault virtual machine on a core of the processorby an isolation scheduler; and when finding that the loads of the other virtual machines share one L2 cache with the fault virtual machine, transferring the fault virtual machine to a core corresponding to an independent cache by the isolation scheduler and carrying out VM-core scheduling on the other normal virtual machines according to cache sensitivity characteristics. The invention discloses a method for the dynamic isolation scheduling of the virtual machines on the multi-core processor, thereby preventing the other normal virtual machines from being polluted by the cache, reducing the running influence of the fault virtual machine on the normal virtual machines and enhancing the whole isolation of the system.
Owner:ZHEJIANG UNIV
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