26results about "Amplification control device circuits" patented technology

This disclosure relates to a variable gain amplifier with a cross-coupled switching arrangement. An example VGA includes a transistor arrangement having multiple transistors configured to implement one or more gain step circuits for the VGA, and a cross-coupled switching arrangement having multiple switches configured to selectively change the coupling of at least some of the transistor terminals (depending on whether the given gain step circuit should be ON or OFF). Using a cross-coupled switching arrangement advantageously allows all transistors to always be ON during operation and the coupling of some transistor terminals to achieve in-phase current flow through the various transistors to apply maximum gain or to achieve subtraction to apply minimum gain. Such a VGA can be inherently broadband, enabling highly linear broadband operation without resorting to significant trade-offs with other performance parameters.

An attenuator arrangement comprising at least a first attenuation path configured to couple between a signal processing chain, SPC, and a measurement apparatus; said SPC comprising a first and second SPC terminal, said SPC configured to apply one or both of a gain and phase change on a signal passed between the SPC terminals; said measurement apparatus configured to measure one or both of the gain and the phase change applied by SPC by coupling to and receiving signals from said SPC terminals; wherein one of said first SPC terminal and said second SPC terminal is coupled to the measurement apparatus through said first attenuation path; and wherein the at least first attenuation path of the attenuator arrangement is configured to provide, selectively, for attenuation of the signal to the measurement apparatus to make the signal power of the signals from said SPC terminals more equal.

The present invention discloses a variable gain amplifier circuit having linearity compensation mechanism is provided. A lower amplification transistor of a lower branch of an amplification circuit is controlled by an AC input signal. Upper amplification transistors of an upper branch generate an AC output signal at an amplification output terminal. An amplification control circuit controls the turn-on and turn-off of the upper amplification transistor according to an amplification control voltage. An inductor is electrically coupled between a power supply terminal and the amplification output terminal. In a gain adjustment circuit, each of adjustment control circuits controls the turn-on and turn-off of each of adjustment transistors according to a adjustment control voltage. A first voltage adjustment circuit adjusts an impedance of each of the adjustment transistors to further adjust an AC cross voltage relation between the lower amplification transistor and the upper amplification transistors.

A continuous time linear equalizer (CTLE), comprising: a first transconductance gain circuit configured to amplify an input voltage signal with a first transconductance gain to generate a first current signal; a second transconductance gain circuit configured to amplify the input voltage signal with a second transconductance gain to generate a second current signal, wherein the second transconductance gain circuit is configured to reuse the first current signal to generate the second current signal; and at least one resistor through which the first current signal and the second current signal flow to generate an output voltage signal.

The present invention discloses a control circuit of a power amplifier, comprising a first voltage-controlled current source coupled to the collector of a current mirror tube, wherein the collector current of the current mirror tube is positively correlated with the collector current of the output transistor of the power amplifier; and a second voltage-controlled current source coupled to the base of the current mirror tube, wherein the control voltage of the second voltage-controlled current source follows the collector voltage of the current mirror tube. The present invention uses the mirror current of the output current of the power amplifier to be controlled to control the output current of the power amplifier to be controlled, thereby realizing the output power control of the power amplifier in a way of indirectly controlling the output power, avoiding the use of expensive off-chip precision resistors and saving costs.

Certain aspects of the present disclosure relate to a signal processing circuit. The signal processing circuit generally includes: an impedance transformation circuit (404) coupled between a first node and a second node; and an attenuation circuit (402) including a first variable resistive element (408) coupled between the first node and the reference potential node and a second variable resistive element (406) coupled between the second node and the reference potential node.

To provide a semiconductor device with improved safety.SOLUTION: A semiconductor device comprises: a substrate; a first transistor of a depression type; a second transistor of an enhancement type; a gate control circuit; a gate terminal; and a power terminal. The first transistor is provided on the substrate and has a channel area including a nitride semiconductor of a first conductivity type. The second transistor is connected in series with the first transistor on the substrate and operates via an inversion layer of a second conductivity type being an opposite polarity of the first conductivity type. The gate control circuit is connected with a gate electrode of the second transistor on the substrate. The gate terminal is electrically connected with a gate electrode of the first transistor. The power terminal is electrically connected between the first transistor and the second transistor and constituted to supply power supply voltage to the gate control circuit.SELECTED DRAWING: Figure 1

An apparatus for controlling the gain and phase of an input signal input to a power amplifier comprises a gain control loop configured to control the gain of the input signal based on power levels of the input signal and an amplified signal output by the power amplifier, to obtain a predetermined gain of the amplified signal, and a phase control loop configured to obtain an error signal related to a phase difference between a first signal derived from the input and a second signal derived from the amplified signal, and control the phase based on the error signal, to obtain a predetermined phase of the amplified signal. The phase control loop is arranged to delay the first signal before obtaining the error signal, such that the delayed first signal and the second signal used to obtain the error signal correspond to the same part of the input signal. The gain control loop may compare a power of a third signal derived from the input signal and a power of a fourth signal derived from the amplified signal. The third and fourth signals may be output by first and second couplers, which may have coupling factors that are selected such that the third and fourth signals have the same power level when the amplified signal has the predetermined gain. The current gain and phase of the amplified signal may be dependent on an operational history of the power amplifier, which may be a GaN power amplifier, and the apparatus and power amplifier may be included in a satellite. In another embodiment, a satellite includes a power amplifier control system that uses a feed-forward control loop to control both the gain and phase of a signal input to the power amplifier.

The present invention realizes an attenuator circuit and an output load circuit capable of suppressing performance degradation and compensating for variations in gain due to temperature characteristics of a power amplifier element. An attenuator circuit (1) is provided with: an input / output circuit (10) provided at the preceding stage of a power amplifier; and a first control circuit (20) that controls the gain of the input / output circuit (10). An input / output circuit (10) is provided with at least: a first resistor (11) electrically connected between an input terminal (ATTin) and an output terminal (ATTout); and a first FET (12) electrically connected between the output terminal (ATTout) and the reference potential point (GND). The first control circuit (20) is provided with at least a second FET (21) having substantially the same on-resistance as the first FET (12) when the same gate bias voltage as the first FET (12) is applied. The gate of the first FET (12) and the gate of the second FET (21) are electrically connected.

An attenuator arrangement comprising at least a first attenuation path configured to couple between a signal processing chain, SPC, and a measurement apparatus; said SPC comprising a first and second SPC terminal, said SPC configured to apply one or both of a gain and phase change on a signal passed between the SPC terminals; said measurement apparatus configured to measure one or both of the gain and the phase change applied by SPC by coupling to and receiving signals from said SPC terminals; wherein one of said first SPC terminal and said second SPC terminal is coupled to the measurement apparatus through said first attenuation path; and wherein the at least first attenuation path of the attenuator arrangement is configured to provide, selectively, for attenuation of the signal to the measurement apparatus to make the signal power of the signals from said SPC terminals more equal.

A semiconductor device includes a substrate, a first transistor of a depletion type, a second transistor of an enhancement type, and a gate control circuit. The first and second transistors are provided on the substrate and each include a channel region of a first conductivity type. The first and second transistors are connected in series. The channel region of the first transistor includes a nitride semiconductor. The second transistor operates via an inversion layer of a second conductivity type induced in the channel region thereof. The gate control circuit is connected to a gate electrode of the second transistor. The substrate includes a gate terminal and a power supply terminal. The gate terminal is electrically connected to a gate electrode of the first transistor. The power supply terminal is electrically connected to a connection part between the first transistor and the second transistor.

Certain aspects of the present disclosure are directed towards a signal processing circuit. The signal processing circuit generally includes: an impedance transformation circuit (404) coupled between a first node and a second node; and an attenuation circuit (402) including a first variable resistive element (408) coupled between the first node and a reference potential node, and a second variable resistive element (406) coupled between the second node and the reference potential node.

To provide a variable gain amplifier with relatively low-power by using a relatively small number of components.SOLUTION: A variable gain power amplifying technique in an illustrated example includes: generating (400) a first oscillating signal by using a network of one or more reactive components included in an oscillator; and outputting (402) a second oscillating signal via one or more taps included in the network of the reactive components. The second oscillating signal is proportional to the first oscillating signal and has magnitude less than that of the first oscillating signal. The power amplifying technique further includes: selecting (404) one of the first and second oscillating signals to use for generating a power-amplified output signal; and amplifying (406) the selected one of the first and second oscillating signals to generate the power-amplified output signal.SELECTED DRAWING: Figure 21

The disclosure relates to a current converter circuit (600) for converting a linear input current (lctrl_lin) to an exponential output current (lctrl_sum), the current converter circuit (600) comprising first and second current converters (601, 602), each of which comprises: an input current branch (6031, 6032) with an input current source (6041, 6042) connected in series with a tuning voltage circuit (6051, 6052) and a tuning resistor (6061, 6062) between a supply voltage line (607) and a common voltage line (608); and an output current branch (6091, 6092) with an output transistor (6101, 6102) having a collector connected to an output node (6111, 6112), a emitter connected to the common voltage line (608) and a base connected to the tuning voltage circuit (6051, 6052), wherein the output nodes (6111, 6112) of the first and second current converters (601, 602) are connected to a summing output node (612) of the current converter circuit (600).

A continuous time linear equalizer (CTLE), comprising: a first transconductance gain circuit configured to amplify an input voltage signal with a first transconductance gain to generate a first current signal; a second transconductance gain circuit configured to amplify the input voltage signal with a second transconductance gain to generate a second current signal, wherein the second transconductance gain circuit is configured to reuse the first current signal to generate the second current signal; and at least one resistor through which the first current signal and the second current signal flow to generate an output voltage signal.

A circuit includes a Sallen-Key filter and a programmable gain amplifier coupled to the Sallen-Key filter, the Sallen-Key filter including a source follower implementing a unity gain amplifier. The circuit is capable of implementing a programmable gain that decouples the bandwidth of the circuit from its gain setting via adjustment of a current mirror replication ratio in the programmable gain amplifier. The programmable gain amplifier can include a differential voltage-to-current converter, a current mirror pair, and a programmable output gain stage. At least one leg in the Sallen-Key filter and the programmable gain amplifier can include transistors arranged in the same circuit configuration.

Embodiments include systems, methods, and apparatuses for providing a dimming function in a single stage AC input light emitting diode (LED) driver with a controller that contains an on-chip error amplifier and an on-chip fixed reference voltage source coupled to a first input of the error amplifier. The controller controls a duty cycle of a switching transistor to cause a feedback voltage, applied to a first package input terminal, to match the reference voltage. To achieve a dimming function, a voltage across a current sense resistor in series with the LEDs is applied to a first input of a high gain differential amplifier, and a variable dimming control voltage is applied to a second input of the differential amplifier. The output of the differential amplifier is coupled to the first package input terminal. The differential amplifier input signals will be matched at the target LED current level.

The disclosure relates to a current converter circuit. Example embodiments include a current converter circuit (600) for converting a linear input current (Ictrl_lin) to an exponential output current (Ictrl_sum), the current converter circuit (600) comprising first and second current converters (601, 602), each of which comprises: an input current branch (6031, 6032) with an input current source (6041, 6042) connected in series with a tuning voltage circuit (6051, 6052) and a tuning resistor (6061, 6062) between a supply voltage line (607) and a common voltage line (608); and an output current branch (6091, 6092) with an output transistor (6101, 6102) having a collector connected to an output node (6111, 6112), a emitter connected to the common voltage line (608) and a base connected to the tuning voltage circuit (6051, 6052), wherein the output nodes (6111, 6112) of the first and second current converters (601, 602) are connected to a summing output node (612) of the current converter circuit (600)

Certain aspects of the present disclosure are directed towards a signal processing circuit. The signal processing circuit generally includes: an impedance transformation circuit coupled between a first node and a second node; and an attenuation circuit including a first variable resistive element coupled between the first node and a reference potential node, and a second variable resistive element coupled between the second node and the reference potential node.

A transmission module (30) includes n oscillator modules (50) and a phase command signal generator (40). Each of the oscillator modules (50) includes a voltage controlled oscillator (60) and an amplification circuit (70). The voltage controlled oscillators (60) output transmission high-frequency signals having the same frequency and synchronized among the n oscillator modules (50) by synchronous control based on a common reference signal (Sr). The amplification circuits (70) each perform power amplification for the transmission high-frequency signal from a corresponding one of the voltage controlled oscillators (60) and output the resultant signal. Phases of the transmission high-frequency signals synchronized among the n oscillator modules (50) and output from the voltage controlled oscillators (60) are separately controlled according to respective n phase command signals (ϕ1* to ϕn*) from the phase command signal generator (40).

This invention relates to a variable gain power amplifier. In the described example, the variable gain power amplification technique includes: generating a first oscillation signal (400) using a network of one or more reactive components included in an oscillator; and outputting a second oscillation signal (402) via one or more taps included in the network of reactive components. The second oscillation signal has an amplitude that is proportional to and smaller than that of the first oscillation signal. The power amplification technique further includes selecting one of the first and second oscillation signals to generate a power-amplified output signal (404), and amplifying the selected one of the first and second oscillation signals to generate the power-amplified output signal (406).

A variable gain amplifier includes a differential amplifier circuit having a pair of input terminals and a pair of output terminals, and a first variable attenuation circuit connected between at least one of the pair of input terminals and the pair of output terminals of the differential amplifier circuit and capable of switching a resistance value on the basis of a control signal which is input from the outside.

A variable gain amplifier (1) includes a differential amplifier circuit (13) having a pair of input terminals and a pair of output terminals, and a first variable attenuation circuit (14) connected between at least one of the pair of input terminals and the pair of output terminals of the differential amplifier circuit (13) and capable of switching a resistance value on the basis of a control signal which is input from the outside.

The present invention discloses a gain and phase adjustable amplifier based on a memristor, which utilizes the electrical characteristics of the memristor and is combined with a negative resistance source-coupled differential pair circuit, and the gain and phase of the amplifier are changed by setting the resistance value of the memristor through pulse programming. A current mirror with high output impedance is used in the architecture to bypass the DC component of the memristor, so that the static operating voltage at both ends of the memristor is less than the threshold voltage of the memristor, which significantly saves the integrated circuit layout area compared to the traditional bypass capacitor method. By connecting a negative resistance generating circuit in series with the memristor, the memristor as a positive resistor can be adjusted through pulse programming to obtain an adjustable resistance value within a certain positive and negative resistance range, and the positive and negative adjustable resistor can be used as the load of the source-coupled differential pair circuit to achieve both the gain and the phase of the amplifier.

The present invention provides a transducer protection system and method. A transducer module at least comprises a transducer, and a signal source is used for generating a first signal; a protection module is used for predicting an actual displacement and / or temperature of the transducer according to the first signal, an amplification factor of the power amplifier and built-in transducer parameters to generate a prediction result, comparing the prediction result with a preset value to generate an analysis result, and regulating the first signal to form a second signal according to the analysis result; a power amplifier is used for receiving the second signal, and performing power amplification on the second signal to form a driving signal; and the transducer module is used for receiving the driving signal, and at least one transducer in the transducer module can work according to the driving signal.

An attenuator circuit includes an input / output circuit that is provided at a stage preceding an power amplifier circuit, and a first control circuit that controls a gain of the input / output circuit. The input / output circuit includes at least a first resistor that is electrically connected between an input terminal and an output terminal, and a first FET that is electrically connected between the output terminal and a reference potential point. The first control circuit includes at least a second FET that has an ON resistance that is substantially equal to an ON resistance of the first FET at a time when a gate bias voltage that is the same as a gate bias voltage of the first FET is applied. A gate of the first FET and a gate of the second FET are electrically connected.