This invention discloses a high-precision single-ended read circuit based on a
voltage-controlled magnetic anisotropic
magnetic memory (VMI). The circuit includes a master-slave RFSE read sensing circuit, a finely adjustable
voltage divider circuit, and a read
control signal generation circuit. The master-slave RFSE read sensing circuit comprises two independent RFSE read sensing circuits, enabling alternating read operations during the reset and sensing phases. The finely adjustable
voltage divider circuit fine-tunes the
bit line voltage within a ±10% range of the
voltage divider resistor to compensate for process variations and voltage drift. The read
control signal generation circuit generates an adjustable asynchronous read
control signal through a read
delay chain structure. The
memory cell being read consists of a magnetic
tunnel junction (MTJ) and a memory access
transistor. This circuit innovatively introduces a finely adjustable
voltage divider circuit, eliminating the need for a traditional
reference cell and effectively resisting PVT fluctuations. High-speed, high-precision asynchronous reading is achieved through the master-slave RFSE read sensing circuit and the read control
signal generation circuit.