77results about How to "Improve wiring reliability" patented technology

A touch-sensitive device includes a transparent substrate, a decoration layer and a touch-sensing electrode layer. The decoration layer is disposed on the transparent substrate and includes a plurality of medium layers stacked with each other, and the decoration layer has at least one step portion and the step portion is defined by edges of two adjacent medium layers. The touch-sensing electrode layer is disposed on the transparent substrate and overlaps at least the step portion.

In order to provide a built-in capacitor type wiring board capable of preventing misalignment of the capacitor, a capacitor built-in type wiring board is provided which includes a core board; a multilayer portion disposed on at least one side of the core board and formed by a plurality of interlayer insulating layers; and a plurality of conductor layers alternately laminated on the core board. The capacitor is of a chip-like shape with first and second main surfaces and includes a dielectric layer; electrode layers laminated on the dielectric layer; and a hole portion opening at least at the second main surface. The capacitor is embedded in the interlayer insulating layers so that the second main surface faces the core board.

Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.

A wiring board is comprised of a core board, a capacitor, a conductor containing portion and a laminated wiring portion. The core board has an accommodation hole. The capacitor has a through hole therein and is accommodated in the accommodation hole. The conductor containing portion has a current supplying conductor and is disposed in the through hole so as to be surrounded by the capacitor. The laminated wiring portion includes a component mounting region in which a first connection terminal electrically connected to the current supplying conductor is provided. Further, second connection terminals are disposed so as to sandwich the first connection terminal therebetween.

An interconnect structure including a lower interconnect level with a first dielectric layer having a first conductive material embedded therein; a dielectric capping layer located on the first dielectric layer and some portions of the first conductive material; an upper interconnect level including a second dielectric layer having at least one via opening filled with a second conductive material and at least one overlying line opening filled with the second conductive material disposed therein, wherein the at least one via opening is in contact with the first conductive material in the lower interconnect level by a via gouging feature; a dielectric liner on sidewalls of the at least one via opening; and a first diffusion barrier layer on sidewalls and a bottom of both the at least one via opening and the at least one overlying line opening. A method of forming the interconnect structure is also provided.

Embodiments provide a wiring board which is structured to be suitable for connection with components, whereby its reliability can be improved. An embodied wiring board of the invention has pads and a solder resist in which opening portions which expose the pads are formed. Protrusion-shaped members are fixed to some of the surfaces of the pads. The surfaces of the pads and the surfaces of the protrusion-shaped members are covered with solder bumps. The height of the solder bumps is larger than the height H1 and H2 of the protrusion-shaped members. The opening portions have different inner diameters, and the volume of the protrusion-shaped members increases as the diameter of the opening portion decreases.

A layered chip package includes a main body, and wiring disposed on a side surface of the main body. The main body includes a plurality of first-type layer portions each including a first-type semiconductor chip; and a second-type layer portion including a second-type semiconductor chip. The first-type semiconductor chip includes a plurality of memory cells. The second-type semiconductor chip includes a control circuit that controls writing and reading on and from the memory cells included in the plurality of first-type layer portions. Each layer portion includes an insulating portion covering at least one side surface of the semiconductor chip, and a plurality of electrodes connected to the semiconductor chip. Each of the electrodes has an end face that is located at the side surface of the main body and connected to the wiring.

The invention discloses a touch control device which comprises a transparent base plate, a touch control sensing electrode layer and a decorating layer. The decorating layer is arranged on the transparent base plate and comprises a plurality of mutually stacked dielectric layers, and a class structure is arranged between end edges of every two adjacent dielectric layers. The touch control sensing electrode layer is arranged on the transparent base plate and at least overlaps class structures. By means of the design, the decorating layer adopts layering indentation class design so that a transparent electrode or a transparent electrode connecting wire can gradually climb along each step of gentle slope when extends and is distributed onto the decorating layer, wire breaking probability can be reduced remarkably, the wire distribution reliability can be improved, and reject ratio of products can be effectively reduced.

There is provided a method of manufacturing a wiring substrate. The method includes: (a) forming a first resist layer having first openings therein on a first surface of a support plate, forming first plated films in the first openings by an electrolytic plating method, and removing the first resist layer; (b) forming a second resist layer having second openings therein on the first surface of the support plate, forming second plated films in the second openings by an electrolytic plating method, and removing the second resist layer; (c) forming a wiring layer and an insulating layer such that the wiring layer is electrically connected to the first and second plated films; and (d) removing the support plate to expose the first and second plated films.

There is provided a wiring substrate. The wiring substrate includes: an insulating layer; first electrode pads having first exposed surfaces, the first exposed surfaces being exposed from the insulating layer; and second electrode pads having second exposed surfaces, the second exposed surfaces being exposed from the insulating layer. There is a level difference between the first exposed surfaces and the second exposed surfaces.

A wiring board has a wiring member, a first reinforcing member and a second reinforcing member. The wiring member has wiring layers and insulating layers which are stacked, and the wiring layers include a first connecting electrode formed on a surface of the wiring member and a second connecting electrode formed on a back surface of the wiring member. A pin is formed on the second connecting electrode. The second reinforcing member is formed by a resin and serves to reinforce the wiring member. The first reinforcing member is formed on the whole back surface of the wiring member except for the pin provided on the second connecting electrode.

When the film thickness of an insulating film on a fuse connected to a circuit is not uniform within a wafer surface, there was a problem that disconnection of the fuse might become insufficient due to the insufficient intensity of a laser or disconnection of even an adjacent fuse due to excessive laser irradiation might occur. Further, a problem also occurred that after disconnection of the fuse, moisture entered from exterior through the region in which the fuse has been disconnected, so that the quality of a film underlying the fuse was adversely affected. After a SiON film, a SiN film, and a SiO2 film have been formed to cover the fuse in this stated order, etching is performed to the SiN film, which is an etching stopper film. The SiON film having a uniform and desired film thickness is thereby formed on the fuse.

A semiconductor apparatus is constructed such that the top surface, contacting a barrier metal film, of a conducting film embedded in a trench is located below the top surface of a second interlayer insulating film. The semiconductor apparatus is fabricated such that a plasma treatment is performed in a non-nitriding environment after a polishing process using CMP, so as to form a damaged layer on top of the second interlayer insulating film and the conducting film, and a portion of the damaged layer is removed by etching.

A trench is formed in an insulation film formed on top of a semiconductor substrate, and a barrier metal film is formed on the surface of the trench. After a copper or copper alloy film is formed on the barrier metal film, an oxygen absorption film in which a standard energy of formation of an oxidation reaction in a range from room temperature to 400° C. is negative, and in which an absolute value of the standard energy of formation is larger than that of the barrier metal film is formed, and the assembly is heated in a temperature range of 200 to 400° C. A semiconductor device can thereby be provided that has highly reliable wiring, in which the adhesion to the barrier metal film in the copper interface is enhanced, copper diffusion in the interface is suppressed, and electromigration and stress migration are prevented.

A method for the formation of copper wiring films includes the steps of forming a first copper film by means of a CVD method on an insulating diffusion barrier film, which insulating diffusion barrier film has been formed on a semiconductor substrate and in which a concavity has been established; heating the first copper film to a temperature within the range from 200 to 500° C.; and subsequently forming a second copper film on the first copper film by a plating method using the first copper film as an electrode.

In order to provide a built-in capacitor type wiring board capable of preventing misalignment of the capacitor, a capacitor built-in type wiring board is provided which includes a core board; a multilayer portion disposed on at least one side of the core board and formed by a plurality of interlayer insulating layers; and a plurality of conductor layers alternately laminated on the core board. The capacitor is of a chip-like shape with first and second main surfaces and includes a dielectric layer; electrode layers laminated on the dielectric layer; and a hole portion opening at least at the second main surface. The capacitor is embedded in the interlayer insulating layers so that the second main surface faces the core board.

A power supply apparatus is provided. The power supply apparatus includes a first power pin, a second power pin, a DC output regulator, a current sensing circuit, and a compensation circuit. The first and second power pins are coupled to an external load through a first wire and a second wire respectively. The DC output regulator receives an input voltage and a feedback voltage and generates an output voltage and an output current. The current sensing circuit senses the output current and generates a sensing voltage. The compensation circuit generates a compensation voltage responding to the sensing voltage. The compensation voltage is a sum of a voltage drop on the first wire and a voltage drop on the second wire. The compensation circuit compensates the output voltage according to the compensation voltage, such that a load voltage of the external load is kept at a stable voltage value.

A wiring substrate is provided with an insulating resin film; and first and second conductive films provided on the back side and top side of the insulating resin film, respectively. The wiring substrate includes a via formed to fill a recess provided in the insulating resin film and electrically connecting the top side and back side of the insulating resin film. The via includes a first metal film formed to cover the side wall of the recess, an oxide film formed to cover the first meal film, and a second metal film formed on the metal oxide film.

The invention provides a liquid crystal display device which comprises a short circuiting bar area, a periphery area and a display area, wherein the short circuiting bar area comprises a plurality of detection terminals, each detection terminal is connected with a plurality of short circuiting bars, each short circuiting bar is connected with a plurality of connecting lines, each connecting line is electrically connected with the detection terminals through at least two signal transmission channels; the periphery area is electrically connected with the short circuiting bar area; and the display area is electrically connected with the periphery area. Due to the fact that each connecting line is electrically connected with the detection terminals through at least two signal transmission channels in the liquid crystal display device, even if one signal transmission channel breaks, the detection operation can be carried out through the other signal transmission channel, reliability of the liquid crystal display device is improved, and wire arrangement reliability in the short circuiting bar area is improved particularly.

When a barrier film is formed on an exposed surface of an interlayer insulation film on a substrate, the interlayer insulation film having a recess formed therein, and a metal wiring to be electrically connected to a metal wiring in a lower layer is formed in the recess, a barrier film having an excellent step coverage can be formed and increase of a wiring resistance can be restrained. An oxide film on a surface of the lower copper wiring exposed to a bottom surface of the interlayer insulation film is reduced or edged so as to remove oxygen on the surface of the copper wiring. Then, by supplying an organic metal compound containing manganese and containing no oxygen, generation of manganese oxide as a self-forming barrier film is selectively allowed on an area containing oxygen, such as a sidewall of the recess and a surface of the interlayer insulation film, while generation of the manganese oxide is not allowed on the surface of the copper wiring. Thereafter, copper is embedded in the recess.

The objective of the present invention is to prevent damage to an interlayer insulation film when forming a structure having a first wiring and a second wiring, which is laminated on the first wiring and connected to the first wiring, and are filled in the interlayer insulation film. After forming a first pattern corresponding to the first wiring on a first sacrificial film, fill a metal in the first pattern. Next, after forming a second sacrificial film on the first sacrificial film, form a second pattern corresponding to the second wiring, and fill a metal in the second pattern. Thereafter, remove the first sacrificial film and the second sacrificial film to form the first wiring and the second wiring, and further form the interlayer insulation film so as to coat the barrier film after coating the first wiring and the second wiring.

A coupling structure of electronic components, by which the break down of drive wiring at the time of folding a flexible substrate is prevented and the reliability of wiring is increased, is realized. In the coupling structure of electronic components of the present invention, a liquid crystal driver and a liquid crystal panel are arranged such that a surface of the flexible substrate, that surface being provided with the drive wiring and a solder resist, faces a surface of an element substrate, that surface being provided with display wiring. Furthermore, the drive wiring and the display wiring are electrically coupled to each other, and the solder resist is in contact with the element substrate.

A method of manufacturing a semiconductor memory according to the present invention includes steps of forming an insulating film, into which a conductive plug connected to a source or a drain in a transistor in a memory cell region and into which a first conductive layer which will become a part of a circuit in a peripheral circuit region are buried, on a semiconductor substrate, forming a first interlayer insulating film on the insulating film, forming, in the first interlayer insulating film, conductive plugs for connecting a first conductive layer and a second conductive layer arranged in a layer upper than the first interlayer insulating film, forming lower electrode of the capacitor in the first interlayer insulating film after the connection plugs are formed, forming capacitance insulating film, and forming upper electrode of the capacitor.

A method of forming wires of a semiconductor device including forming a first metal wire on a semiconductor substrate; forming a first insulating film on the first metal wire; etching a portion of the first insulating film to expose a surface portion of the first metal wire; forming a first barrier metal film on sidewalls of the opening and the exposed first metal wire; etching a portion of the first barrier metal film on the first metal wire to expose a surface portion of the first metal wire; performing a heat treatment process on the exposed surface portion of the first metal wire to improve surface roughness; and forming a second wire by filling the opening using a conductive material.

A clutchless wire cutting apparatus for successively cutting off leading end portions of a predetermined length of wire from a wire stock. The wire is advanced through a cutting station which includes the cutting apparatus. The cutting apparatus includes an electrical motor whose output is coupled to the cutter mechanism which performs the successive wire cuts. A proximity switch or sensor located downstream of the cutting station signals a controller each time the wire reaches the desired length to periodically generate an electrical current to the electrical motor for selectively intermittently driving the motor at a relatively high frequency corresponding to the frequency at which wire cuts are made. The motor may also be continuously driven for cutting shorter wire lengths. The motor has an output on an motor shaft which is coupled to a cutter shaft via a belt drive. The cutter shaft includes an eccentric cam which acts directly on the wire cutter. A proximity sensor or switch is also provided at the cutting station to determine the location of the wire cutter to provide a home position for the system.

The invention relates to a half-module pivoted window mechanism applied to a sub transonic speed wind tunnel. The half-module pivoted window mechanism comprises a driving transmission module, a feedback and measurement module and a rotating module, wherein the driving transmission module consists of a support seat, a large cylindrical straight gear, an alternating current servo motor, a speed reducer, a gear press cover, a small cylindrical straight gear, a compression cover and a compression screw, the feedback and measurement module consists of a potentiometer support seat, a potentiometer, a press sheet, a shaft coupler, a small shaft and a connecting cover, and the rotating module consists of a right bearing cover, a bearing seat, a pair of precise conical roller bearings, a left bearing cover and a main shaft. Through the adoption of a cylindrical straight gear group, the half-module pivoted window mechanism can realize the movement for positive 360 degrees and negative 360 degrees, in addition, the integral hosting of the mechanism can be realized, a measurement part adopting the potentiometer as the core is adopted for the transmission matching of the cylindrical straight gear group, and the attack angle control precision being + / -3' can be realized.