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37results about How to "Minimum separation" patented technology

High density integrated circuit packaging with chip stacking and via interconnections

Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors therethrough, preferably by metallization or filling with conductive paste which may be stabilized by transient liquid phase (TLP) processes and preferably with or during metallization of conductive pads, possibly including connector patterns on both sides of at least some of the chips in the stack. At least some of the chips in the stack then have electrical and mechanical connections made therebetween, preferably with electroplated solder preforms consistent with TLP processes. The connections may be contained by a layer of resilient material surrounding the connections and which may be formed in-situ. High density circuit packages thus obtained may be mounted on a carrier by surface mount techniques or separable connectors such as a plug and socket arrangement. The carrier may be of the same material as the chip stacks to match coefficients of thermal expansion. High-density circuit packages may also be in the form of removable memory modules in generally planar or prism shaped form similar to a pen or as a thermal conduction module.
Owner:INT BUSINESS MASCH CORP

High density integrated circuit packaging with chip stacking and via interconnections

Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors therethrough, preferably by metallization or filling with conductive paste which may be stabilized by transient liquid phase (TLP) processes and preferably with or during metallization of conductive pads, possibly including connector patterns on both sides of at least some of the chips in the stack. At least some of the chips in the stack then have electrical and mechanical connections made therebetween, preferably with electroplated solder preforms consistent with TLP processes. The connections may be contained by a layer of resilient material surrounding the connections and which may be formed in-situ. High density circuit packages thus obtained may be mounted on a carrier by surface mount techniques or separable connectors such as a plug and socket arrangement. The carrier may be of the same material as the chip stacks to match coefficients of thermal expansion. High-density circuit packages may also be in the form of removable memory modules in generally planar or prism shaped form similar to a pen or as a thermal conduction module.
Owner:IBM CORP

Stress-relieved acrylic optical lenses and methods of manufacture by injection coining molding

Stress-relieved molded acrylic opthalmic lenses, and injection-coining mold processes for molding stress-relieved plus and minus to high-minus diopter ophthalmic lenses of optically superior acrylic resin, able to pass standardized impact drop tests for use as eyeglass lenses, are described. The injection-coining processes use two-plate and three-plate mold assemblies. The cavity of a two plate runnerless mold is partially filled under partial tonnage, and the movable half of the mold controlled to coin and densify the acrylic resin under secondary or full tonnage, when a velocity-pressure changeover point is reached. In a process which employs a three-plate mold assembly, the lens mold cavities are partially filled under less than total clamp tonnage, with a cavity plate held by hydraulic pressure against a movable half of the mold. The mold assembly is then closed under full tonnage when a velocity-pressure changeover point is reached, collapsing the cavity plate a stationary platen, bringing the mold assembly to a total stack height. The processes produce impact resistant acrylic ophthalmic lenses which are stress-relieved and without weld lines, even in the high minus diopter range, with center thickness' as low as one millimeter, and edge thickness' up to ten millimeters.
Owner:FGX INT
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