19 results about "Input output controller" patented technology

An integrated circuit (IC) chip and / or system includes a processing core and an input / output (I / O) controller, coupled to a host interface, to detect a plurality of state transitions in a data signal received over a system management bus (SMBUS) of the host interface and generate an interrupt responsive to detecting each state transition. An interrupt controller routes each interrupt to the processing core. The processing core, in response to receipt of each respective interrupt, retrieves a corresponding state transition received over the SMBUS and stores, in a memory, the corresponding state transition.

The present invention discloses a safety protection design method for an adaptive augmented controller of a launch vehicle, comprising simplifying the error term of the adaptive augmented controller to obtain a single-input-output AAC controller; simplifying the parameter angular rate deviation Δω, the error term e of the error term loop and the damping term loop of the single-input-output AAC controller; and simplifying the parameter angular rate deviation Δω, the error term e of the error term loop and the damping term loop of the single-input-output AAC controller. r , launch vehicle attitude angle and damping term y s The signal is limited; the output channel of the output circuit is limited, and the output change rate of the AAC controller is limited; a trigger access mechanism is set for the output change rate of the single-input-output AAC controller. This invention designs a safety protection design method for an adaptive augmentation controller for launch vehicles, solving the safety protection design problem of launch vehicles using adaptive augmentation controllers, achieving beneficial, harmless, simple, flexible, and reliable engineering application effects.

The invention relates to the technical field of automation control, and provides a parameter calibration method, device and equipment based on EPICS and a medium. According to the method, each device in a controlled system is electrically connected with an input and output controller of an EPICS system, a database template file is configured based on an electrical connection relation, then function modules of each device in the controlled system are predefined, and when a target parameter calibration instruction is received, the target parameter calibration instruction is determined to be a target parameter calibration instruction. The method comprises the steps of analyzing a target parameter calibration instruction to obtain N instruction segments arranged in sequence, obtaining a function module corresponding to each instruction segment after instruction recognition is passed, and inputting execution parameters in the target parameter calibration instruction into the function modules, so that parameter calibration is completed by executing the function modules corresponding to the N instruction segments in sequence. The automatic control process of parameter calibration is realized, a fixed program written in an underlying code is not completely depended any more, shutdown for programming adjustment in each experiment process is not needed, the calibration complexity is reduced, and the calibration efficiency is improved.

The invention provides a method, equipment and a program product for performing input / output access control by a Linux kernel. The method comprises the steps that an input and output access request initiated by an application program through an upper layer driving interface of the Linux kernel is obtained, and the input and output access request carries a read-write port address; intercepting the input and output access request, and determining a target input and output controller corresponding to the read-write port address according to registration information of registered input and output controllers; and calling a driving program of the target input and output controller to execute a read-write operation corresponding to the input and output access request. The method and device are used for solving the problem that in the prior art, in order to adapt to different instruction set architectures, Linux kernel upper layer drive framework codes need to be modified.

Provided is a nonvolatile memory including a plurality of planes including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to the plurality of word lines and the plurality of bit lines; an input / output controller configured to receive commands and addresses, input / output data, and set each plane to a ready status or a busy status; a control logic circuit configured to control the plurality of planes based on commands, and detect a fixed-time read command; and a status delay logic configured to determine a target plane and a bit level based on an address received with the fixed-time read command, and determine a delay time based on the bit level, and the input / output controller is configured to change the target plane from the ready status to the busy status, and restore the target plane from the busy status to the ready status.

The invention provides a boron neutron capture therapy target control system based on an EPICS architecture. The boron neutron capture therapy target control system comprises an equipment control level, an input and output controller IOC and an operator interface OPI which are connected in sequence. The equipment control level is used for monitoring and controlling physical equipment of the target system through a programmable logic controller (PLC); the input and output controller IOC is used for running a distributed real-time database and an equipment driving program so as to perform data exchange and communication between the equipment control level and the operator interface OPI; and the operator interface OPI is used for providing a graphical interface so as to display real-time data, state and alarm information of the system, and receiving an operation instruction. The purposes of high integration level and good real-time performance are achieved.

Apparatus and method for a reconfigurable processor for prefill and decode operations. An example processor comprises: compute circuitry to perform compute operations associated with prefill phase of an LLM workload in which first tokens of an input prompt are processed in parallel and a decode phase in which response tokens are generated sequentially; a memory controller; an input / output (I / O) controller; an interconnect fabric; and a management controller to select between a first plurality of operational modes responsive to detecting the prefill phase and a second plurality of operational modes responsive to detecting the decode phase, wherein the first plurality of operational modes are selected to enhance performance of the compute circuitry and the second plurality of operational modes are selected to enhance performance of the memory controller and the interconnect fabric.

The utility model relates to input / output controller technical field discloses an input / output controller based on thyristor, including multiple thyristor module, and the thyristor module includes triode switch Q1, input / output protection module, gate pulse trigger module and gate protection module, input / output protection module connects to triode switch Q1's base and collector respectively, gate pulse trigger module connects to triode Q1's emitter and collector respectively, and gate protection module is connected to gate pulse module, and each thyristor module is mutually connected in series and forms controller switch, and the controller switch is formed by the series connection setting multiple thyristor modules, need not to set up peripheral heating circuit, makes the controller switch to have extremely low heat loss, can use stably under the vibration and rotation environment, and lower cost.

Apparatus and method for reducing thermal dissipation of IO circuitry. For example, one embodiment of processor comprises: a plurality of cores; an interconnect coupled to the plurality of cores; an input / output (IO) controller coupled to the interconnect, the IO controller including one or more control registers and one or more IO links to couple to one or more IO devices; a thermal sensor to measure a temperature; and a power management controller to generate a first notification to system software or firmware responsive to the temperature reaching or exceeding a threshold, the system software or firmware to responsively update the one or more control registers to cause the IO controller to operate the one or more IO links at a reduced speed.

A port configuration request is received from a host system of a plurality of host systems. The port configuration request comprises a plurality of port configurations each indicating a physical interface and a communication protocol for an interface port of the plurality of interface ports. An input / output (I / O) controller of each I / O function of a plurality of I / O functions associated with a respective interface port is configured to operate according to the communication protocol of the port configuration associated with the respective interface port for each interface port of the plurality of interface ports based on a port configuration of the plurality of port configurations associated with the respective interface port. A memory access command is executed using an I / O controller of an I / O function connected to the host system responsive to receiving the memory access command from a host system of the plurality of host systems.

Random access memory (RAM) is attached to an input / output (I / O) controller of a chipset (e.g., on a motherboard). This chipset attached RAM is optionally used as part of a tiered storage solution with other tiers including, for example, nonvolatile memory (e.g., a solid state drive (SSD)) or a hard disk drive. The chipset attached RAM is separate from the system memory, allowing the chipset attached RAM to be used to speed up access to frequently used data stored in the tiered storage solution without reducing the amount of system memory available to an operating system running on the one or more processing units.

Embodiments of the present invention provide an integrated circuit, a packaging method for the integrated circuit, and an electronic device. The integrated circuit includes: a chip pin processing circuit, communication circuits of multiple communication types, an input / output controller, and a port enable controller, which are packaged inside the housing of the integrated circuit; pins packaged outside the housing, and the pins are connected to the chip pin processing circuit; wherein, the port enable controller selectively determines a type of communication port from the communication circuits of the multiple communication types, and the input / output controller selectively cooperates with the port enable controller to control the input / output state of a predetermined port and communicate by conducting communication between the pin and the input / output controller. In this way, according to the communication type actually required by the pins of different integrated circuits, a type of communication port is selectively determined to conduct communication between the corresponding pins and the input / output controller of the integrated circuit.

The application relates to the technical field of automatic control, and provides a parameter calibration method, device, equipment and medium based on EPICS. The method is characterized in that: each device in a controlled system is electrically connected with an input / output controller of an EPICS system, a database template file is configured based on an electrical connection relationship, a function module of each device in the controlled system is predefined, when a target parameter calibration instruction is received, the target parameter calibration instruction is parsed to obtain N instruction segments in sequence, after instruction recognition, a function module corresponding to each instruction segment is acquired, and an execution parameter in the target parameter calibration instruction is input into the function module, so that parameter calibration is completed by sequentially executing the function modules corresponding to the N instruction segments, an automatic control process of parameter calibration is realized, the parameter calibration no longer completely depends on a fixed program written in underlying code, programming does not need to be adjusted every time the experimental process is stopped, the calibration complexity is reduced, and the calibration efficiency is improved.

A storage system is protected from tampering of software executed by the storage system. The storage system includes a first storage controller and a second storage controller. The first storage controller includes a first input and output controller configured to input and output host data, and a first management controller. The second storage controller includes a second input and output controller configured to input and output host data, and a second management controller. The first management controller is configured to store a backup of software of at least one of the second storage controller or the first input and output controller. A copy of tampered software of the at least one is stored. The tampered software of the at least one is recovered by the backup.

The application discloses a shipborne multi-source flexible DC loop network test bench, which comprises a DC loop network main system, a first hydrogen fuel cell power supply system, a second hydrogen fuel cell power supply system, a first composite energy storage system, a second composite energy storage system, a first load system, a second load system, a compact reconfigurable input / output (CRIO) controller, a lower computer and an upper computer, wherein the DC loop network main system comprises a first DC bus, a second DC bus, a third DC bus and a fourth DC bus which are electrically connected in sequence through four solid-state switches; the first hydrogen fuel cell power supply system is electrically connected with the second DC bus, the second hydrogen fuel cell power supply system is electrically connected with the fourth DC bus, the first composite energy storage system is electrically connected with the first DC bus, and the second composite energy storage system is electrically connected with the third DC bus. The application can solve the technical problem that the existing rule type control method excessively depends on engineering experience and preset rules and is difficult to adapt to complex and changeable working conditions.

A machine tool (10) is provided with: a feed shaft device (16) that moves a workpiece and a tool relative to each other; an NC device (12) for feeding the shaft device; and an input / output controller (42) interposed between a plurality of devices (26, 28, 30) that output signals and the NC device in order to connect the devices and the NC device, the input / output controller being provided with: an input unit (32) that connects the devices, acquires the signals from the devices as current information, and converts the current information into stored information; and a storage unit (34) that is connected to the input unit, receives the storage information from the input unit, and stores the storage information.

The invention relates to a data writing method and device, an input and output controller and a processor chip. The method comprises the following steps: receiving a first write request, and caching a first request message of the first write request; sending the first write request to a consistency master node to indicate the consistency master node to perform consistency maintenance on the first write request; receiving a second write request, and caching a second request message of the second write request; under the condition that the first access address is the same as the second access address, merging the first data and the second data to obtain target write-in data; and under the condition that a consistency maintenance completion message of the first write request returned by the consistency master node is received, sending target write data to the consistency master node so as to indicate the consistency master node to execute a data write operation corresponding to the target write data. By adopting the method, the problems of time delay and bandwidth caused by traditional data serial writing can be eliminated, and the effects of improving the data transmission efficiency and simplifying the data transmission process are achieved.

The present application provides a method and device for requesting data, which can reduce the data access bit width. The method includes: a matching unit MU determines a first request message and a second request message, the first request message is used to obtain the first data, and the second request message is used to obtain the second data, the first request message includes first common request information and first private request information, and the second request message includes second common request information and second private request information; the MU generates a first message based on the first request message and the second request message, the first message includes common request information obtained by merging the first common request information and the second common request information, the first private request information, and the second private request information; the MU sends the first message to an input / output controller IOC, and the first message is used to request the acquisition of the first data and the second data.

Provided are a nonvolatile memory and a storage device, the nonvolatile memory including: a plurality of planes including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to the plurality of word lines and the plurality of bit lines; an input / output controller configured to receive a command and an address, input / output data, and set each plane to a ready state or a busy state; a control logic circuit configured to control the plurality of planes based on the command and detect a fixed time read command; and a state delay logic configured to determine a target plane and a bit level based on an address received with the fixed time read command and determine a delay time based on the bit level, and the input / output controller is further configured to change the target plane from the ready state to the busy state and restore the target plane from the busy state to the ready state.