35 results about "Negative conductance" patented technology

A proximity sensor has an oscillation circuit, an amplitude measurement circuit, a control circuit and a signal processing circuit. The oscillation circuit has an LC resonant circuit and an oscillation control circuit that is configured to supply an electric current to the LC resonant circuit to generate oscillating voltage across the LC resonant circuit. The amplitude measurement circuit is configured to produce an amplitude signal corresponding to the amplitude of the oscillating voltage. The control circuit is configured to set the negative conductance of the oscillation control circuit to a critical value by which the LC resonant circuit can oscillate based on the amplitude signal. The signal processing circuit is configured to produce a distance signal corresponding to the distance between an object and the sensing coil based on a parameter associated with the negative conductance.

An adaptable, reconfigurable, multi-band SAW-less radio receiver and / or transmitter is described that can operate within the limitations of 40nm and similar low voltage CMOS technology nodes, comprising: 1) A current output node from a single LNA or a number of LNAs. In the latter case, the current output node sums all of the separate LNA outputs. 2) A shunt style of steerable frequency notch filter for attenuating interferers added to the LNA current output node. 3) An adaptable negative conductance circuit that allows the amount of interference rejection provided by the notch filter to be varied with the bias current setting and RF device size setting. 4) An adaptable negative conductance circuit that allows parasitic resistance such as that encountered in a 40nm or similar low voltage CMOS technology node to be compensated for. The level of compensation can be a function of the setting of bias current and RF device width. 5) An overdrive monitor circuit that provides a signal which indicates the distribution of the available supply voltage between devices in the negative conductance circuit. This signal in turn can be applied to a local analog loop which adjusts the bias current and RF device width within the negative conductance circuit to maximize the linearity of the notch filter for a specific level of notch filter rejection. Alternatively, this control loop can be closed through the digital baseband. 6) A shunt style of steerable frequency notch filter placed prior to the PPA (pre-power amplifier) or PPAs in a cellular transmitter for rejecting transmitter noise occurring in the corresponding receiver band and / or spurious frequency components. 7) A steerable frequency notch filter placed prior to the LO (local oscillator) input to a frequency upconverter (transmitter application) or frequency downconverter (receiver application) to attenuate out of band noise and / or spurious frequency components.

Provided is a differential cascode voltage-controlled oscillator that can reduce a phase noise by the use of a quality factor enhancement technique with negative conductance and can mitigate a ground-caused noise effect by the use of a cascode connection technique. The differential cascode voltage-controlled oscillator includes an AC signal generator, and first through fourth cascode amplifiers. The AC signal generator generates an AC signal with a certain frequency according to a control voltage. The first cascode amplifier is connected in a cascode configuration, and amplifies the AC signal to output the resulting signal to a first output terminal. The second cascode amplifier is connected in a cascode configuration and connected to the first cascode amplifier in a cross-coupled configuration, to amplify the AC signal to output the resulting signal to a second output terminal. The third cascode amplifier is connected in a cascode configuration to amplify the AC signal to output the resulting signal to the first output terminal. The fourth cascode amplifier is connected in a cascode configuration and connected to the third cascode amplifier in a cross-coupled configuration, to amplify the AC signal to output the resulting signal to the second output terminal. Herein, the first and second cascode amplifiers and the third and fourth cascode amplifiers are symmetrically connected to differentially amplify the AC signal.

The capacitance of the capacitor with the constant capacitance is equivalently reduced in the capacitance of a resonant capacitor in a voltage control oscillator to increase the variable amount of the capacitance of the resonant capacitor, and to expand an oscillation frequency range. There are provided a differential negative conductance generator circuit having two resonation nodes for differential output, a differential resonant circuit having a variable capacitance that is controlled by voltage control and an inductance connected in parallel to each other, and a differential negative impedance circuit. A resonant circuit and a negative impedance circuit are connected between the resonation nodes. The capacitor with the constant capacitance that occurs between the resonation nodes is reduced by the negative impedance of the negative impedance circuit. The capacitor with the constant capacitance is represented by floating capacitors that occur between one of the resonation nodes and a ground potential and between the other resonation node and the ground potential, respectively.

Power amplifiers are disclosed that demonstrate improved linearity and efficiency in applications requiring significant peak-to-average ratios (PAR). A power amplifier in accordance with the present invention comprises a first transistor in an input stage that converts DC power into AC power; and a second transistor in a negative conductance stage that has a current-voltage characteristic with at least two slopes. The at least two slopes of the current-voltage characteristic are separated by a break point that may be controlled. The power amplifier may also include a non-dissipative two-port device that has two AC ports. The non-dissipative two-port device has a Z matrix with two zero-valued diagonal elements and two complex valued off-diagonal elements having a same sign and only imaginary parts for an operating frequency. In one implementation, the diagonal entries of the Z matrix are small at twice the operating frequency.

This invention discloses a device to realize radio frequency press oscillator rough adjusting, which comprises LC resonance circuit and active device to provide negative conductance, wherein, the said LC resonance circuit capacitor is three-end transfiguration tube with its two ends connected with different control circuit. The invention only uses single three-end transfiguration tube to spare the extra fixed capacitors.

A method and an apparatus for detecting a phase-to-earth fault on a three-phase electric line of an electric network, the apparatus determining a neutral admittance based on a ratio of a difference between zero sequence currents on the three-phase electric line and a difference between zero sequence voltages in the electric network before an earth fault and during the earth fault. The apparatus also compares the determined neutral admittance, to a predetermined operation characteristic to detect a phase-to-earth fault on the three-phase electric line. The predetermined operation characteristic, when presented on an admittance plane, defines a closed area such that the center of the closed area is offset from the origin of the admittance plane towards a negative susceptance direction and / or towards a negative conductance direction.

A CMOS IC containing a quantum well electro-optical device (QWEOD) is disclosed. The QWEOD is formed in an NMOS transistor structure with a p-type drain region. The NLDD region abutting the p-type drain region forms a quantum well. The QWEOD may be fabricated with 65 nm technology node processes to have lateral dimensions less than 15 nm, enabling possible energy level separations above 50 meV. The quantum well electro-optical device may be operated in a negative conductance mode, in a photon emission mode or in a photo detection mode.

A gated resonant tunneling diode (GRTD) is disclosed including a metal oxide semiconductor (MOS) gate over a gate dielectric layer which is biased to form an inversion layer between two barrier regions, resulting in a quantum well less than 15 nanometers wide. Source and drain regions adjacent to the barrier regions control current flow in and out of the quantum well. The GRTD may be integrated in CMOS ICs as a quantum dot or a quantum wire device. The GRTD may be operated in a negative conductance mode, in a charge pump mode and in a radiative emission mode.

The invention discloses a low-temperature-coefficient variable gain amplifier for enlarging the gain change range. The low-temperature-coefficient variable gain amplifier for enlarging the gain change range comprises a variable gain circuit, a cross coupling temperature compensation circuit and a gain control circuit, wherein the variable gain circuit adjusts the circuit gain according to the intensity of an input signal to stabilize the output power, a negative resistor is adopted to serve as a source electrode degeneration resistor to form positive feedback to improve the transconductance current efficiency of the input transconductance level, a transistor pair connected with a diode and a transistor pair connected with a cross coupler form an active load, under the condition of different-mode signals, a cross coupler pair serves as a negative conductor to reduce the overall conductance of the load, the common-mode gain of the circuit is very low, the cross coupler pair not only improves the gain of the circuit, but also improves the common-mode rejection capacity of the circuit, and meanwhile the cross coupler pair and a reference source with the positive temperature characteristic form the temperature compensation circuit to compensate for the gain range changes of the variable gain circuit caused by temperature changes. The low-temperature-coefficient variable gain amplifier for enlarging the gain change range has the advantages of being large in single-level gain adjusting range, resistant to technological changes, resistant to temperature changes, low in energy consumption and the like.

Provided is a position sensor that is equipped with a detector (2), an oscillation circuit (3), a signal processing circuit (4), and a resonance circuit (1) comprising a detection coil (L1) and a capacitator (C1), wherein the oscillation circuit (3) forms a negative feedback loop from: an amplitude detection circuit (30) that detects the amplitude of an oscillation signal output by the resonance circuit (1); an integrating circuit (31) that outputs a signal in response to the finite difference between a given reference voltage and the amplitude value of the oscillation signal detected by the amplitude detection circuit (30); a negative conductance control circuit (32) that, on the basis of the output of the integrating circuit (31), controls the negative conductance of the oscillation circuit (3) so that the given reference voltage and the amplitude value of the oscillation signal match; and an operational amplifier (OP1) that adjusts so as to equalize the oscillation voltage (VLC) of the resonance circuit (1), and the applied voltage (VR) of the negative conductance control circuit (32).

The invention consists of LC resonance loop used in providing negative conductance active device. The capacitor of the above LC resonance loop is a varactor capacitor connected in series with a coupling capacitor, and then connected in parallel with a digital controlled switching capacitor. The above coupling capacitor is also a digital controlled switching capacitor.

The invention consists of LC resonance loop used in providing negative conductance active device. The voltage control end of the voltage controlled oscillator is connected with the voltage transform circuit. The invention can vary the voltage of voltage controlled oscillator to vary the range of frequency modulation and control the gain of voltage controlled oscillator.

The invention discloses a two-stage operational amplifier, comprising a bias voltage generation unit, a first-stage operational amplifier unit and a second-stage operational amplifier unit. The first-stage operational amplifier unit comprises a foldable cascode amplifier circuit and a cross coupling load. The cross coupling load is connected with a load differential pair in the foldable cascode amplifier circuit. The cross coupling load comprises two transistors. The two transistors in the cross coupling load and the two transistors in the corresponding load differential pair form two current mirror structures. The two current mirror structures are crossly coupled. According to the technical scheme of the amplifier, through addition of the cross coupling load to the load differential pair in the foldable cascode amplifier circuit, the gain of the two-stage operational amplifier is increased through adoption of a positive feedback negative conductance gain enhancement technology; and moreover, through reasonable setting of the parameters of the mos transistors in the foldable cascode amplifier circuit, the noises of the two-stage operational amplifier can be reduced.

The invention discloses a low-power high-gain circulation type folding type cascade amplifier. The cascade amplifier is characterized in that the amplifier is formed by a main amplifier and an electric conductance offsetting circuit. In the main amplifier, an N44 and an N45 are crossly coupled, so equivalent transconductance of the amplifier is increased while the total current is unaltered, thereby increasing the gain of the amplifier. The electric conductance offsetting circuit is formed by a first electric conductance offsetting circuit CIRCUIT_P and a second electric conductance offsetting circuit CIRCUIT_N. The electric conductance offsetting circuit CIRCUIT_P or CIRCUIT_N detects the node voltage of source ends of cascade pipes P8, P9 (N12, N13) and generates feedback voltage to control a negative conductance generating circuit so as to allow the generated negative conductance to be functions of a top PMOS: P6, P7 (bottom NMOS: N10, N11) electric conductance so as to follow and offset gds of the top PMOS or the bottom NMOS. If two sides of the PMOS and the NMOS completely offset the electric conductance of the top PMOS and the bottom NMOS, the output resistance and zero-frequency gain are infinite, so performance of the amplifier can be remarkably improved.

The new RTD-HBT differential oscillator circuit topology is proposed. At the nodes of the inductors and varactors in the conventional differential oscillator topology, each the RTD is attached to increase the magnitude of the negative conductance, which results in performance improvement in both the RF output power and phase noise. And, the differential sinusoidal voltage waveform which is essential for the wireless communication system are generated. In addition, the DC power consumption RTD-HBT differential oscillator circuit is similar to the conventional HBT differential oscillator due to the small DC power consumption performance of the RTD.

The invention belongs to the technical field of magnetic field detection, magnetic field sensor materials and devices, and particularly relates to a Si-based magnetic sensing device with low magnetic field and giant magnetoresistance based on a differential negative conductance phenomenon, a preparation method and a performance testing method. The device provided by the invention is prepared in such a mode that a heavily doped region with a certain concentration is formed on a Si single crystal substrate by using a method of ion implantation, and then two electrodes are extracted by using a method of depositing a metal film. The acquired device can generate giant magnetoresistance, and the magnetoresistance originates from resistance variations caused by current controlled differential negative conductance. The device can display a significant magnetoresistance effect in the low magnetic field, and has very high low magnetic field sensitivity. The device further has the advantages of low price, simple preparation technology and the like, is an excellent magnetic field sensor, and has potential applications in the fields of disk magnetic reading heads, electronic compasses, movement device monitoring and the like.

The invention consists of LC resonance loop used in providing negative conductance active device. The current of the above negative conductance circuit is tunable. The invention uses variable negative conductance circuit structure by which multi negative conductance circuit network can link and cut off. By varying the total equivalent negative conductance the variable negative conductance circuit can optimally neutralize the conductance loss to meet the condition of oscillation of oscillator and make phase noise and amplitude of output signal to reach optimal value.

The invention discloses a method for realizing positive and negative photoconduction in a memristor by using an optical signal. The memristor comprises a bottom electrode layer, a top electrode layer and an oxide layer located between the bottom electrode layer and the top electrode layer, wherein the oxide layer comprises an oxygen-enriched layer and an oxygen-deficient layer, the oxygen-enriched layer is adjacent to the top electrode layer, and the oxygen-deficient layer is adjacent to the bottom electrode layer. According to the method, the optical signal is input through the top electrode layer, and the method comprises the steps that the memristor obtains a positive photoconduction mode or a negative photoconduction mode through the optical signal; in the forward photoconduction mode, the optical signal is ultraviolet light; and in the negative photoconduction mode, the optical signal is visible light or infrared light. By utilizing the own characteristics of the memristor disclosed by the invention, the reversible regulation and control of the positive and negative conductance polarities of the memristor can be realized under the optical signals with different wavelengths.

A two-stage operational amplifier is provided to comprise a bias voltage generator, a first stage operational amplifier and a second stage operational amplifier, wherein the first stage operational amplifier comprises a folded cascode amplifier circuit and a cross coupling load, the cross coupling load is coupled to a load differential pair in the folded cascode amplifier circuit, the cross coupling load comprises two transistors, the two transistors in the cross coupling load and two transistors in the load differential pair constitute two current mirror structures, which are cross coupled. In the solution, the cross coupling load is added to the load differential pair in the folded cascode amplifier circuit, to increase gain of the two-stage operational amplifier by using positive feedback and negative conductance gain enhancement technology; while parameters of MOSFETs in the folded cascode amplifier circuit are properly set to reduce noise of the two-stage operational amplifier.

An oscillator includes a resonator configured to resonate an electromagnetic wave in a resonant axis direction and a capacitance unit electrically connected in parallel to the resonator. The resonator includes a negative resistor, a first conductive layer, and a second conductive layer, where the negative resistor has a gain to the electromagnetic wave and is disposed between and in contact with the first conductive layer and the second conductive layer. At a resonant frequency fLC generated by an inductance Ls which the wiring configured to electrically connect the capacitance unit to the resonator and the capacitance unit constitute, and an inner capacitance Cwg of the resonator, a conductance including the inductance Ls, a resistance component Rs of the wiring and the capacitance unit, and a capacitance C of the capacitance unit is equal to or higher than an absolute value Gwg of negative conductance of the negative resistor.

The invention consists of LC resonance loop used in providing negative conductance active device. The capacitor of the above LC resonance loop is a varactor capacitor connected in series with a coupling capacitor, and then connected in parallel with a digital controlled switching capacitor. The above coupling capacitor is also a digital controlled switching capacitor.

The invention provides a full-band conductance compensation method for improving MMC-HVDC stability under a weak power grid. The method comprises the following steps: establishing a system grid-connected parallel form equivalent model through electrical parameters and control parameters of MMC-HVDC; deriving according to the equivalent model to obtain an MMC output admittance expression, and obtaining an output conductivity expression according to the MMC output admittance expression; and solving a first-order derivative about the angular frequency for the output conductance expression to obtain a minimum extreme point and a full-band conductance minimum value. Therefore, the negative conductance frequency band range and the full-frequency-band conductance compensation value of the MMC-HVDC control system are given, a full-frequency-band conductance compensation strategy is proposed based on the negative conductance frequency band range and the full-frequency-band conductance compensation value, and the stability of the MMC-HVDC control system under the weak power grid is remarkably improved.

The new RTD-HBT differential oscillator circuit topology is proposed. At the nodes of the inductors and varactors in the conventional differential oscillator topology, each the RTD is attached to increase the magnitude of the negative conductance, which results in performance improvement in both the RF output power and phase noise. And, the differential sinusoidal voltage waveform which is essential for the wireless communication system are generated. In addition, the DC power consumption RTD-HBT differential oscillator circuit is similar to the conventional HBT differential oscillator due to the small DC power consumption performance of the RTD.

The invention belongs to the technical field of magnetic field detection and magnetic field sensor materials and devices, in particular to a silicon-based low magnetic field giant magnetoresistance magnetic sensor device based on differential negative conductance phenomenon and its preparation and performance testing method. The device uses ion implantation to form a certain concentration of heavily doped regions on the Si single crystal substrate, and then uses the method of depositing metal thin films to lead out two electrodes. The resulting device can generate a giant magnetoresistance that arises from a change in resistance caused by a current-controlled differential negative conductance. This device can exhibit significant magnetoresistance effect in low magnetic field, and has high low magnetic field sensitivity. The device also has the advantages of low price, simple preparation process, etc., is an excellent magnetic field sensor, and has potential applications in the fields of magnetic disk reading head, electronic compass, and motion device monitoring.

The invention consists of LC resonance loop used in providing negative conductance active device. The current of the above negative conductance circuit is tunable. The invention uses variable negative conductance circuit structure by which multi negative conductance circuit network can link and cut off. By varying the total equivalent negative conductance the variable negative conductance circuit can optimally neutralize the conductance loss to meet the condition of oscillation of oscillator and make phase noise and amplitude of output signal to reach optimal value.