11 results about "Short loop" patented technology

The invention provides a level network minimum closed loop rapid search method based on survey station grouping and degree priority, which belongs to the technical field of surveying and mapping engineering, and comprises the following steps of: preprocessing measurement original data, eliminating abnormal values and redundant information, ensuring connectivity of a control network, constructing an adjacency phenotype topological graph, and constructing a minimum closed loop by taking a survey station as a node and a survey line as an edge; the method comprises the following steps: recording node degrees and initializing traversal parameters, preferentially accessing nodes with a large number of connection edges in a traversal stage by adopting a degree priority strategy to accelerate discovery of short rings, generating an initial closed ring set through depth-first recursive traversal, performing independence and minimum verification, eliminating redundant rings and non-minimum rings, and finally obtaining an initial closed ring set through depth-first recursive traversal. Finally, the minimum independent closed ring meeting the requirement is reserved, the closing error of each ring is calculated and compared with the tolerance, and an achievement report containing the ring path, the closing error and the qualified state is generated and used for subsequent adjustment or visualization processing. According to the method, the search efficiency and the result reliability are improved by optimizing a traversal strategy and a ring check mechanism.

The application provides a leveling network minimum closed loop fast search method based on station grouping and degree priority, belongs to the technical field of surveying and mapping engineering, and carries out pretreatment on measurement original data, rejects abnormal values and redundant information, ensures control network connectivity, constructs an adjacent list type topology graph, takes stations as nodes, takes survey lines as edges, records node degrees and initializes traversal parameters, in the traversal stage, a degree priority strategy is adopted, nodes with more connection edges are preferentially accessed, so that the discovery of short loops is accelerated, an initial closed loop set is generated through deep priority recursive traversal, independence and minimumness checking is carried out, redundant loops and non-minimum loops are rejected, finally, the required minimum independent closed loop is reserved, the closed difference of each loop is calculated, and comparison with the limit difference is carried out, a result report containing loop paths, closed differences and qualified states is generated, and is used for subsequent adjustment or visual processing. Through optimization of the traversal strategy and the loop checking mechanism, the search efficiency and the result reliability are improved.

A frequency divider is disposed on a circuit board and includes a first coupling unit, a second coupling unit, a third coupling unit, a long loop unit, a short loop unit, and at least one ground plane. The first coupling unit and the second coupling unit couple the long loop unit, the first coupling unit and the third coupling unit couple the short loop unit, each of the first coupling unit, the second coupling unit, the third coupling unit, the long loop unit, and the short loop unit includes at least one signal via and is located on at least two conductive layers, and the at least one ground plane is located on another conductive layer of the circuit board. Thus, layout area can be saved. The present disclosure also relates to a circuit element.

The invention belongs to the technical field of microwave photons, and provides a double-ring photoelectric oscillator and a stabilizing method thereof. The oscillator is provided with a long ring and a short ring and comprises a stabilizing device; the stabilizing device comprises a first piezoelectric ceramic optical fiber stretcher, a motor space light delay line and a second piezoelectric ceramic optical fiber stretcher; generating two optical probe signals; the first optical probe signal is converted into a first electric probe signal through the long ring; a second optical probe signal is converted into a second electric probe signal through the short ring; an electric probe signal is output after being subjected to detection, coupling and power division; the two frequency mixers respectively carry out homodyne frequency mixing on the electric probe signal and the phase-shifted and non-phase-shifted radio frequency signals to generate a zero-frequency error signal; the two phase-locked loops generate compensation control signals according to the error signals; the control signal adjusts an optical fiber delay line; the stability of the two loops is ensured, the problem of combined signal frequency drift caused by neglecting short-loop delay change is solved, the coherence requirement on optical signals is avoided by electric domain combination, and smooth tuning of the output radio frequency signal frequency is realized.

This invention discloses a method for constructing QC-LDPC codes that minimizes the number of short loops, comprising the following steps: Step 1: Randomly generate the initial QC-LDPC code base matrix according to the construction requirements; Step 2: Count the number of short loops passing through each element in the base matrix; Step 3: Sort all elements in the base matrix according to the number of short loops; Step 4: Iterate through each element sequentially, calculate the number of short loops corresponding to all values ​​of the element, select the value with the fewest short loops as the new value of the element, if the element value changes, return to Step 2 for the next round of optimization, otherwise continue to traverse the next element; Step 5: Replace each element in the base matrix with a CPM (Current Minimum Quantity). This invention performs global optimization on all elements in the entire matrix, which can approach the global optimum solution, and does not rely on mathematical theories such as finite fields, has no restrictions on parameters, and has great flexibility.

The invention belongs to the technical field of microwave photons, and provides a double-ring photoelectric oscillator with a stabilizing device and a stabilizing method thereof, the double-ring photoelectric oscillator is provided with a long ring, a short ring and a stabilizing device; the stabilizing device comprises a first piezoelectric ceramic optical fiber stretcher and a motor space light delay line; the radio frequency signal source generates a first optical probe signal and a second optical probe signal through modulation; the first optical probe signal is converted into a first electric probe signal after passing through the long ring; a second optical probe signal is converted into a second electric probe signal after passing through the short ring; the first frequency mixer and the second frequency mixer are used for performing homodyne frequency mixing on the electric probe signal and the radio frequency signal to generate a zero frequency error signal; and the two phase-locked loops generate compensation control signals according to the zero-frequency error signals. According to the invention, by outputting the control signal and adjusting the optical fiber delay line, the stability of two loops is ensured, the problem of combined signal frequency drift caused by neglecting short-loop delay change is solved, and the coherence requirement on two paths of optical signals is avoided by electric field combination.

The invention relates to the field of construction of a new-generation mobile communication core network and an access network, and discloses a resource scheduling optimization method for an open RAN (Radio Access Network), which comprises the following steps that: a distribution unit determines the time offset of a subframe to be scheduled relative to a channel sampling moment, acquires the round-trip delay of an open forward transmission interface and calculates the delay fluctuation quantity; and determining an adjustment weight based on the time delay fluctuation quantity, performing attenuation correction on the channel prediction compensation bias, determining a modulation coding correction amplitude, and performing step-back processing on the modulation coding order when the feedback failure rate exceeds a protection threshold. An interaction mechanism that local short loop feedback executes correction on far-end long loop prediction is constructed, scheduling misalignment caused by forward jitter is effectively counteracted, and the stability and throughput of resource allocation under an open architecture are improved.

The invention discloses an ultrahigh-frequency radio frequency identification tag aiming at a metal surface and a screw fixing design, which is applied to the field of RFID (Radio Frequency Identification), and aims at solving the problem that most tags are required to be directly attached to the metal surface in design, and a certain gap is introduced between the tag and the metal surface in an existing attaching mode, so that the performance of the tag is influenced. According to the tag, the short annular microstrip patch antenna working in the TM01 mode is considered to generate an electromagnetic dead zone when the center current of the patch is zero, a center screw can exist under the condition that the radiation performance of the antenna is not damaged, and the tag can be fixed through a metal screw.

The application discloses a kind of 4 end-to-end coding joint training methods based on isomorphic mapping, comprising: establishing end-to-end communication channel model;The structure constraint of generating matrix and check matrix is constructed;Data set is constructed and channel receiving sample is generated;The double-layer Transform neural coding architecture based on bipolar isomorphic mapping is constructed, and the predicted bit sequence after soft and hard decision is output;Short loop quantity regularization and model parameter joint optimization are carried out;The optimal model obtained by training is used for test set generalization and limit error correction performance evaluation.The application realizes the unified processing of network optimization and traditional confidence propagation hardware decoding highly compatible by the above process, under the condition of fully tapping the high-order algebraic error correction potential, can be applied to 6G mobile communication, deep space exploration and high-throughput data storage and other scenes, break the limitation that model falls into dense graph, significantly eliminate error flat bottom phenomenon, improve the limit error correction performance and robustness of resistance to burst continuous interference.

The invention discloses a QC-LDPC code construction method and system based on Logistic chaotic mapping, a medium and equipment, and belongs to the technical field of communication, and the method comprises the steps: obtaining the number of rows, the number of columns and an expansion factor of a basis matrix according to a code length and a code rate; generating a chaos sequence according to the Logistic mapping parameters, performing displacement value quantization in combination with an expansion factor to obtain an initial basis matrix, performing four-ring detection and elimination in combination with the expansion factor to obtain an optimized basis matrix, constructing a check matrix in combination with the expansion factor, and performing performance check: if not, performing four-ring detection and elimination according to the initial basis matrix and the expansion factor; a QC-LDPC code is constructed according to the basis matrix after iteration; and if so, constructing the QC-LDPC code according to the optimized basis matrix. According to the invention, the problems of poor security, performance-limited short loop and inflexible code rate adjustment caused by the structural regularity of the existing QC-LDPC code construction method are solved.

The current invention offers a method for preparing an electronic integrated circuit (EIC) for the assembly of an optical engine. The method involves stacking a CMOS-based EIC wafer onto a short loop / interposer wafer through face-to-back bonding. This stacked configuration serves as a carrier for the thin CMOS wafers. Subsequently, the stacked wafers are thinned down to the desired height and undergo a via last process. In this process, the thick metal layer from the short loop / interposer wafer acts as an etch stop. The stacked EIC wafers can then be diced and attached to a photonic integrated circuit (PIC) wafer, resulting in the formation of an optical engine.