12 results about "Differential nonlinearity" patented technology

The invention discloses a DAC output error correction method based on digital compensation, and the method comprises the steps: collecting the amplitude deviation, phase deviation and time sequence jitter data of a DAC output signal through a quantum sensing DAC calibration analysis platform, and constructing a multi-dimensional error original data set; calling an operational amplifier imbalance dynamic coupling prediction model to analyze a coupling relationship, and extracting dynamic association features; separating harmonic components and screening error contribution factors based on a broadband DAC harmonic distortion correction model; calculating a gradient change rule and an extreme point position by adopting a differential nonlinear gradient correction model; and integrating the characteristics and the parameters to construct a digital compensation parameter matrix, and dynamically adjusting an output code value through real-time digital modulation to realize error correction. According to the method, dynamic association and distribution characteristics of multi-source errors are accurately captured through multi-model collaborative operation and full-process closed-loop processing, multi-dimensional error synchronous correction is achieved, and DAC output precision and working condition adaptability are improved.

This invention discloses a DAC output error correction method based on digital compensation, comprising: collecting amplitude deviation, phase shift, and timing jitter data of the DAC output signal through a quantum sensing DAC calibration and analysis platform to construct a multi-dimensional original error dataset; calling an operational amplifier offset dynamic coupling prediction model to analyze the coupling relationship and extract dynamic correlation features; separating harmonic components and screening error contribution factors based on a broadband DAC harmonic distortion correction model; calculating the gradient change law and extreme point position using a differential nonlinear gradient correction model; integrating the above features and parameters to construct a digital compensation parameter matrix, and dynamically adjusting the output code value through real-time digital modulation to achieve error correction. This method, through multi-model collaborative operation and full-process closed-loop processing, accurately captures the dynamic correlation and distribution characteristics of multi-source errors, achieves synchronous correction of multi-dimensional errors, and improves DAC output accuracy and operating condition adaptability.

The provided is a digital-to-analog conversion circuit based on an R-2R ladder resistor network architecture. The digital-to-analog conversion circuit based on an R-2R ladder resistor network architecture includes: branch resistors, branch switches, bridge resistors, a first compensation resistor, a second compensation resistor and third compensation resistors; specifically, the compensation resistors (the first compensation resistor, the second compensation resistor and the third compensation resistor) are introduced into an R-2R network in a progressive way, a Differential Nonlinearity (DNL) introduced by mismatch between the compensation resistor and on-state impedance of the branch switch may effectively attenuate due to decrease of the resistance of the compensation resistor at a higher branch, even if it may increase with increase of the resistance of the compensation resistor at a lower branch, the lower DNL may attenuate per se, so the overall DNL will decrease.

Provided is a method for measuring a DAC nonlinearity error based on a pseudo-random sequence. The method includes: numbering pseudo-random number values in a pseudo-random sequence to generate a serial number sequence; arranging the pseudo-random number values in the serial number sequence in a descending or ascending order to determine an order random array; sending the pseudo-random number values, as DAC code values, in the order random array to the DAC sequentially; determining a first differential voltage array and a second differential voltage array according to a voltage corresponding to the DAC code values and the DAC code values; and determining a nonlinearity error measurement result of the DAC according to a differential nonlinearity error test result of the DAC and an integral nonlinearity error test result of the DAC determined by the first differential voltage array and the second differential voltage array.

Provided is a method for measuring a DAC nonlinearity error based on a pseudo-random sequence. The method includes: numbering pseudo-random number values in a pseudo-random sequence to generate a serial number sequence; arranging the pseudo-random number values in the serial number sequence in a descending or ascending order to determine an order random array; sending the pseudo-random number values, as DAC code values, in the order random array to the DAC sequentially; determining a first differential voltage array and a second differential voltage array according to a voltage corresponding to the DAC code values and the DAC code values; and determining a nonlinearity error measurement result of the DAC according to a differential nonlinearity error test result of the DAC and an integral nonlinearity error test result of the DAC determined by the first differential voltage array and the second differential voltage array.

The present disclosure relates to an imaging system having a successive approximation register (SAR) analog-to-digital converter with reduced nonlinearity. An image sensor may include an array of imaging pixels arranged in rows and columns. Each column of imaging pixels may be coupled to an analog-to-digital converter for converting an analog imaging signal from the pixel into a digital signal. The analog-to-digital converter may be implemented as a separate successive approximation register (SAR) analog-to-digital converter (ADC). The separate SAR ADC may include a coarse segment and a fine segment. During a reset sampling phase, a reset level is sampled while a predetermined blanking pulse value is applied to the coarse segment and the fine segment. During the reset conversion, a reset code is obtained. During the signal sampling phase, the signal level is sampled using only the inverse phase of the reset code of the fine segment. During the signal conversion, a signal code is obtained. Operating in this manner, the differential nonlinearity of the ADC is minimized.

The application relates to an analog-to-digital converter testing system and method. A host computer sends a voltage output instruction to a power supply; when a first indication signal sent by the power supply is received, a sampling start instruction is sent to a device under test, and the first indication signal indicates that the output voltage of the power supply is stable. When it is determined that the device under test is in a sampling completion state, the host computer receives a code value obtained by sampling the output voltage by the device under test in response to the sampling start instruction; based on the code value, a preset analysis algorithm is used to generate a differential nonlinearity parameter and an integral nonlinearity error parameter, and performance detection of the device under test is completed. The application can realize that the device under test samples the established stable output voltage, reduces the code value jump problem when the device under test samples the unstable output voltage, and improves the test precision.

Optical sensing apparatus includes a radiation source, which directs a series of optical pulses toward a target scene with a pulse repetition interval (PRI) equal to a first number p of sampling intervals defined by a sample clock. A first array of single-photon detectors output electrical pulses in response to photons reflected from the target scene that are incident thereon. A second array of time-to-digital converters (TDCs) detect the electrical pulses that are output by respective groups of the single-photon detectors in each of a sequence of the sampling intervals in a succession of sampling frames and output respective times of arrival of the electrical pulses. Each sampling frame contains a second number m of the sampling intervals such that p and m are co-prime. Control logic receives and aggregates the times of arrival output by the TDCs into a histogram.

The application discloses a high-precision ADC linearity test method and system, comprising the following steps: inputting a plurality of signal differences to an ADC through a control signal generator, a voltage source, an operator and a channel of a multiplexer, and obtaining a group of output code bits of each signal difference; summing and subtracting two preset signal differences, and summing and subtracting the output code bits of the two preset signal differences, to obtain summing and subtracting results; determining a multivariate linear equation group according to a preset segmented nonlinear model containing a parameter to be solved, the summing and subtracting results and the output code bits; obtaining an optimal solution by solving the equation group, and determining integral nonlinear errors and differential nonlinear errors of the ADC according to the optimal solution and the preset segmented nonlinear model. The application can calculate common-mode and differential-mode of integral nonlinearity and differential nonlinearity, can reduce the precision requirement of an input signal, can greatly shorten test time and sampling points, and has simple system structure, fast algorithm running speed and wide application prospect.

The invention relates to the technical field of data compensation, in particular to a high-precision data compensation method and system. According to the technical scheme, the method comprises the following steps: data acquisition: synchronously acquiring target data and environment parameters, preprocessing the acquired original data to eliminate abnormal values and suppress random noise, and constructing a measurement matrix M and an environment matrix E; error modeling: calculating an integral nonlinear error INL and a differential nonlinear error DNL of the data based on the measurement matrix M, and establishing a nonlinear error fitting function fINL (x); and environment compensation: constructing an error equation containing the environment matrix E. Through organic combination of dynamic self-adaption, multi-source collaboration, intelligent learning and closed-loop control, a data compensation technology is upgraded from a static, isolated and passive traditional mode to a dynamic, collaborative and intelligent advanced mode, the compensation precision is extremely high, and the dynamic response speed and long-term environmental adaptability are excellent.

A phase interpolator (PI) for clock and data recovery (CDR) in a high-speed receiver implements nonlinearity mitigation. The PI interpolates between adjacent phase-shifted clock signals based on digital PI-codes to generate a sampling clock. To reduce phase nonlinearity at high frequencies, the PI applies zone-based dynamic biasing to phase interpolation elements. A bias generator selects and applies one or more bias values to PI unit cells based on a phase zone corresponding to the PI-code. The applied bias adjusts operating characteristics of the interpolation elements, such as bias current or transconductance, to reduce differential nonlinearity and integrated nonlinearity across the PI phase range. In some embodiments, PI unit cells are arranged in groups that receive independently selectable dynamic or fixed biases. The architecture improves phase linearity and timing alignment with low area and power overhead.

The invention relates to an ADC differential nonlinear software correction method for a multichannel analyzer, and the method comprises the steps: S1, selecting a radioactive source for measurement, and adjusting a high voltage to enable a measured spectral line to cover all channel addresses of the multichannel analyzer; a relatively smooth spectral line is obtained by measuring for a certain time length; s2, performing smooth filtering processing on the original spectrum data by using spectrum data analysis software, wherein the phase shift of the selected smooth filtering algorithm is zero; s3, importing the original spectrum data and the filtered spectrum data into Excel software, obtaining a 2 sigma value of each channel of the filtered spectrum data, and screening out channel addresses exceeding the 2 sigma value in the original spectrum data; and S4, obtaining the ratio of the channel value of the filtered spectrum data to the channel value corresponding to the original spectrum data exceeding the 2 sigma value, the ratio being a correction coefficient, and writing the correction coefficient into a multichannel analyzer to realize correction. According to the invention, the correction can be realized without the assistance of additional instruments, and particularly, the assembled energy spectrum probe can be corrected without disassembly and assembly.