49 results about "Differential nonlinearity" patented technology

A corrective action is taken to adjust for nonlinearities in a program voltage which is applied to a selected word line in a memory device. The nonlinearities result in a non-uniform program voltage step size which can cause over programming or slow programming. A digital to analog converter (DAC) which provides the program voltages can have a nonlinear output, such as when certain code words are input to the DAC. The memory device can be tested beforehand to determine where the nonlinearities occur, and configured to take corrective action when the corresponding code words are input. For example, the DAC may have a nonlinear output when a rollover code word is input, e.g., a when a string of least significant bits in successive code words change from 1's to 0's. The corrective action can include repeating a prior program pulse or adjusting a duration of a program pulse.

INL values are determined for a plurality of sub-segments of a DAC that is adapted to accept N bit digital input codes, and a first set of correction codes that can be used to reduce to a range of INL values (to thereby improve linearity of the DAC) are determined and stored. Additionally, DNL values are determined for the plurality of sub-segments for which INL values were determined, and a second set of correction codes that can be used to ensure that all values of DNL >-1 (to thereby ensure that the DAC is monotonic) are determined and stored. This can include using one or more extra bits of resolution to remap at least some of the 2N possible digital input codes (that can be accepted by the DAC) to more than 2N possible digital output codes, to ensure that all values of DNL >-1. Such stored first and second sets are thereafter used when performing digital to analog conversions.

A DAC (10) including an operational amplifier (12) having an input terminal; a plurality of current paths coupled to the input terminal; a plurality of current sources (I1 / 2 -I4 / 2); and an arrangement (11) for switchably coupling current from at least two of the cells to a respective one of the paths in response to an input signal. In a specific embodiment, the inventive DAC (10) further includes a first resistive element (2R1-2R4) disposed in each of the current paths, a second resistive element (R1-R4) disposed between the current paths, and a feedback resistor (RF) disposed between an output terminal of the amplifier and the input terminal thereof. In the illustrative embodiment, the coupling arrangement includes a plurality of switches (SW1-SW4); each of the switches is adapted to switch half of the current from a first source and half of the current from a second source into a respective one of the paths. The invention is adapted to lower the distortion of digital to analog converters by improving differential nonlinearities and integral nonlinearities, caused primarily by current source gradient errors, without the need for trimming.

A digital-to-analog converter improves differential non-linearity by performing a calibration of at least one weighted cell in response to a calibration command. The digital-to-analog converter includes a group of weighted cells, a tunable cell having a tunable weight controlled by a tuning word, and a calibration cell to generate a combined output signal in response to a digital input word, the calibration command, and a calibration sequence. The digital-to-analog converter also includes a calibration circuit configured to sample and subsequently process the combined output signal to establish the tuning word in accordance with the calibration command and the calibration sequence.

A semiconductor device includes: an A / D converter; a digital processing circuit for performing processing based on conversion results from the A / D converter; a first test circuit for performing operation processing for checking a nonlinearity error (INLE) of the conversion results from the A / D converter; and a second test circuit for performing operation processing for checking a differential nonlinearity error (DNLE) of the conversion results from the A / D converter. The first test circuit performs only part of the operation processing for checking the nonlinearity error (INLE) of the conversion results from the A / D converter. The second test circuit performs only part of the operation processing for checking the differential nonlinearity error (DNLE) of the conversion results from the A / D converter. An operation processing section for performing the rest of the operation processing for checking the nonlinearity error (INLE) and the rest of the operation processing for checking the differential nonlinearity error (DNLE) is in a semiconductor test device.

A differential recurrent neural network (RNN) is described that handles dependencies that go arbitrarily far in time by allowing the network system to store states using recurrent loops without adversely affecting training. The differential RNN includes a state component for storing states, and a trainable transition and differential non-linearity component which includes a neural network. The trainable transition and differential non-linearity component takes as input, an output of the previous stored states from the state component along with an input vector, and produces positive and negative contribution vectors which are employed to produce a state contribution vector. The state contribution vector is input into the state component to create a set of current states. In one implementation, the current states are simply output. In another implementation, the differential RNN includes a trainable OUT component which includes a neural network that performs post-processing on the current states before outputting them.

The invention discloses a current rudder DAC buck-boost correction method and circuit, wherein the method includes: image value acquisition: taking the code value N to be converted as the central value to obtain n pairs of code values, and the n pair of code values ​​are A1 to An and B1 to Bn, wherein, the code value A1 to An is greater than the code value N, the code value B1 to Bn is less than the code value N, n is a positive integer, and the mean value of every pair of code values ​​is N; within a certain time T, from the code value B1 To Bn, N, and A1 to An, take out any code value without repetition and output it to the digital-to-analog conversion unit until all 2n+1 code values ​​are taken, and each code value maintains the same time; output adjustment: the adjustment unit adjusts all The output of the digital-to-analog conversion unit is adjusted to stabilize the output voltage of the buck-boost circuit. According to the current rudder DAC buck-boost correction method of the above-mentioned technical solution, the influence caused by the mismatch of a single code value is reduced through the round-robin of the mirror code value, the differential nonlinearity of the digital-to-analog conversion is reduced, and the monotonicity of the buck-boost voltage regulation output is improved. sex.