The invention relates to a VDMOS (Vertical Double-diffusing
Metal-
Oxide-
Semiconductor)
transistor testing structure which belongs to the technical field of semiconductors and comprises a
semiconductor substrate, an epitaxial layer, a first source
doping region, a
second source doping region, a channel region and an interlevel
dielectric layer, a
metal layer covering the upper surface of the
semiconductor substrate and used for leading out two source electrodes and grid electrodes and a back
metal layer covering the bottom surface of the
semiconductor substrate, wherein the channel region positioned below the source
doping region is mutually separated to form double channels, and the source
electrode positioned on the surface of the epitaxial layer is mutually
cut off to be respectively used as a test source
electrode and a test drain
electrode. Under the control of the
voltage of the grid electrode, the test is carried out by using the test source electrode and the test drain electrode as output electrodes, the invention effectively realizes that the
on resistance of the VDMOS
transistor is tested, overcomes the difficulty of superficial characteristics after
grinding and unifies the
test program, thereby further lowering the maintenance and development cost, and improving the product test and feedback efficiency.