50results about How to "Improve voltage conversion efficiency" patented technology

A non-insulated DC-DC converter hs a power MOS•FRT for a highside switch and a power MOS•FET for a lowside switch. In the non-insulated DC-DC converter, the power MOS•FET for the highside switch and the power MOS•FET for the lowside switch, driver circuits that control operations of these elements, respectively, and a Schottky barrier diode connected in parallel with the power MOS•FET for the lowside switch are respectively formed in four different semiconductor chips. These four semiconductor chips are housed in one package. The semiconductor chips are mounted over the same die pad. The semiconductor chips are disposed so as to approach each other.

A power supplying circuit adapted for receiving an output from a power adapter and supplying power to a battery unit and a system load is provided. The power supplying circuit includes a charger unit, a switching unit, and a voltage regulating unit. The charger unit receives a first supplying voltage from the power adapter through a power terminal and charges the battery unit. The switching unit is coupled to the power terminal and the charger unit. The switch unit is configured for receiving the first supplying voltage and a second supplying voltage from the charger unit. The voltage regulating unit is coupled to the switching unit and configured for powering the system load. The switching unit supplies the first supplying voltage to the voltage regulating unit under heavy load condition. The switching unit supplies the second supplying voltage to the voltage regulating unit under light load condition.

A non-insulated DC-DC converter has a power MOS•FET for a highside switch and a power MOS•FET for a lowside switch. In the non-insulated DC-DC converter, the power MOS•FET for the highside switch and the power MOS•FET for the lowside switch, driver circuits that control operations of these elements, respectively, and a Schottky barrier diode connected in parallel with the power MOS•FET for the lowside switch are respectively formed in four different semiconductor chips. These four semiconductor chips are housed in one package. The semiconductor chips are mounted over the same die pad. The semiconductor chips are disposed so as to approach each other.

Disclosed is an inexpensive power source device with which a stable power source required for low-voltage measurement equipment is supplied from a high voltage solar battery power source which is subject to severe variations. A stabilized DC power source device which steps down DC input voltage obtained from a solar battery and outputs the stepped-down voltage to a load such as measurement equipment, wherein the stabilized DC power source device comprises: a series-type first constant-voltage power source circuit that performs voltage step-down and is connected to the solar battery and provided with a constant-current control circuit; a switching circuit that is connected to the first constant-voltage power source circuit; a switchable second constant-voltage power source circuit that is connected to the switching circuit; and a voltage detection circuit that detects the output voltage of the first constant-voltage power source circuit. The output voltage of the first constant-voltage power source circuit is detected and, if the detected voltage is greater than or equal to a first determination voltage, the switching circuit is closed and power is supplied to the load from the second constant-voltage power source circuit. If the detected voltage is less than or equal to a second determination voltage, which is lower than the first determination voltage, the switching circuit is opened and the power supplied to the load from the second constant-voltage power source circuit is stopped.

A photo-coupler device includes a P-type substrate, a P-type epitaxial layer, an insulation layer, a plurality of shielding layers, a metal layer and a passivation layer. The P-type epitaxial layer is deposited on the P-type substrate and includes two conducting regions and a plurality of N+ electrode regions between the two conducting regions. The insulation layer is deposited on the P-type epitaxial layer. The shielding layers comprising first shielding layers and second shielding layers are deposited in the insulation layer in parallel in a horizontal direction, and the first shielding layers are arranged for correspondingly covering the two conducting regions, the second shielding layers are arranged for correspondingly covering the at least one of the N+ electrode regions. The metal layer is made of Ag and is deposited on the insulation layer. The passivation layer is deposited on the metal layer.