This invention discloses a heterogeneous computing platform for
underwater acoustic
signal processing, belonging to the field of sensor architecture technology. The platform includes a VPX-standard-based
chassis,
backplane, and various functional boards plugged into it, including power boards, CPU boards, cache boards, switching boards, and three types of heterogeneous computing boards (A, B, and C). The platform adopts a dual-
bus switching architecture of
Ethernet and SRIO, and integrates a message
middleware compliant with the DDSI-RTPS standard to realize
data publishing and subscription between heterogeneous boards, shielding underlying hardware differences. Each board integrates a domestically produced
chassis management and monitoring
chip, supports the IPMI 2.0 standard, and has hot-swappable, remote monitoring, and dynamic reconfiguration capabilities. This invention achieves intelligent allocation and efficient utilization of computing resources, improves the
modularity, intelligent
algorithm compatibility, and
system scalability of the
underwater acoustic
signal processing platform, and is suitable for various
underwater acoustic detection and intelligent
processing tasks.