This invention relates to the field of
capacitance calculation technology and discloses a
fast algorithm for extracting
parasitic capacitance in large-scale integrated circuits. This method combines the method of moments (MoM), a fast multipole
algorithm for layered dielectrics, and overlapping region
decomposition preprocessing techniques to construct a complete
parasitic capacitance extraction solution. By directly introducing the Green'
s function for the layered
dielectric, the numerical solution strictly satisfies the
electric field transport conditions at the
dielectric interface, and the electrostatic problem in the layered
dielectric is transformed into
boundary integral equations defined on the interconnect surface. Subsequently, the MoM is used to discretize these
boundary integral equations, resulting in a large-scale dense
system of linear algebraic equations. To improve solution efficiency, an efficient preprocessing strategy based on overlapping region
decomposition is further designed, and combined with the matrix-free minimum residual iteration method and the layered fast multipole
algorithm, achieving efficient solution with low computational and storage overhead.