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2results about How to "Improve Brightness Consistency" patented technology

Display panel and its driving method, display device

PendingCN122090753AImprove Brightness ConsistencySmall driving currentStatic indicating devicesComputer hardwareDriving current
This application discloses a display panel and its driving method and display device, relating to the field of display technology. After the display panel enters a first display mode, the total duration H1 of the light emission control signal being at the enable level in the m light emission holding frames of the first screen refresh frame is set to be less than the total duration H2 of the light emission control signal being at the enable level in the m light emission holding frames of the second screen refresh frame, thereby reducing the light emission duration of the first screen refresh frame, and / or, the bias voltage signal DVH1 corresponding to the x-th light emission holding frame in the first screen refresh frame is set to be greater than the bias voltage signal DVH2 corresponding to the x-th light emission holding frame in the second screen refresh frame, thereby reducing the driving current of the driving transistor in the pixel circuit; thereby reducing the brightness of the first screen refresh frame, weakening the brightness jitter of the first screen refresh frame, improving the brightness consistency of the display panel in timing, and thus improving the display effect.
Owner:WUHAN TIANMA MICRO ELECTRONICS CO LTD

Shift register unit, control method thereof, gate driving circuit, and display device

ActiveCN115359831BNo leakage of electricityImprove Brightness ConsistencyShift registerDriver circuit
The application discloses a shift register unit and a control method thereof, a gate driving circuit and a display device. The shift register unit comprises an input circuit, a pull-up circuit, a first reset circuit and a second reset circuit. The input circuit transmits a signal at a second input end to a pull-up node under the control of an input signal at a first input end. The pull-up circuit outputs a clock signal at a clock signal end to an output end under the control of a potential at the pull-up node. The first reset circuit resets the pull-up node through a potential at a first power signal end under the control of a signal at a first reset end. The second reset circuit resets the pull-up node through the potential at the first power signal end under the control of a signal at a second reset end. An invalid level of the signals input at the first reset end and the second reset end is less than the potential input at the first power signal end. The embodiments provided in the application reset the pull-up node through the potential greater than the invalid level of the signals at the first reset end and the second reset end, thereby avoiding the output leakage jump.
Owner:BOE TECHNOLOGY GROUP CO LTD +1