119results about How to "Reduce common mode voltage" patented technology

A driver circuit transmits a signal to a receiver circuit through a signal transmission line. The driver circuit has an output driver, a front driver, and a level adjuster. The front driver drives the output driver, and the level adjuster adjusts the output level of the front driver. The output driver generates a signal whose level is variable in response to an output level of the front driver.

The present invention which belongs to the matrix converter control technology is a control method for a matrix converter. An input phase voltage is divided into a main range and a transition range in which new P, M, N conditions and PM, NP, MN transition conditions are defined, some null vector is selected and the condition combination sequence of bidirectional power switches are adjusted in each modulation period to realize the safe, reliable and rapid commutation and the stable operation of the matrix converter. The present invention also provides a device to realize the present method, including a trigger driving circuit, an over-current protecting circuit, a synchronous signal detecting circuit, a voltage range dividing unit, a switch state control unit and a commutation control unit. Based on the two-step commutation strategy of the voltage of the transition range and without an extra measuring device to precisely detect the relative size relation of the input phase voltage, the present invention solves the problem of a short circuit caused by an inaccurate measurement of the input phase voltage during range alteration, and the waveforms of the output voltage and the input current are not affected.

The invention provides a power system for an electric vehicle. The power system comprises a power battery, a charging / discharging socket, a three-level bidirectional DC / AC module, a motor control switch, a charging / discharging control module and a controller module, wherein a first direct-current end of the three-level bidirectional DC / AC module is connected with one end of the power battery, and a second direct-current end of the three-level bidirectional DC / AC module is connected with the other end of the power battery; and the controller module is respectively connected with the motor control switch and the charging / discharging control module, and is used for controlling the motor control switch and the charging / discharging control module according to a present working mode of the power system. The power system adopts the three-level control, reduces a DC-DC module, can realize high-power charging, reduces the busbar voltage, and is high in efficiency and short in charging time. The invention further provides an electric vehicle and a motor controller.

A differential buffer circuit includes a current source, a current sink, and a switching circuit connected to the current source at a first node and connected to the current sink at a second node. The switching circuit is operative to selectively control a direction of current flowing through differential outputs of the buffer circuit in response to at least a first control signal. The buffer circuit further includes a common mode detection circuit and a common mode control circuit. The common mode detection circuit is operative to detect an output common mode voltage of the buffer circuit and to generate a second control signal representative of the output common mode voltage. The common mode control circuit includes a first terminal connected to the current source and a second terminal connected to the current sink. The common mode control circuit is operative to selectively control the output common mode voltage of the buffer circuit as a function of the second control signal.

Disclosed are various embodiments of a differential logic to CMOS logic translator including a level-shifting and buffering stage configured to receive differential inputs and to provide resulting signals with lower common mode voltage. Further, a gain stage is included to receive the resulting signals and to provide increased swing signals. A CMOS buffer is also included and is configured to receive the increased swing signals and to provide a CMOS logic output. Also disclosed is a method of translating a differential logic signal to a CMOS logic signal including level-shifting and buffering differential input signals to provide resulting signals with lower common mode voltage. The method also includes using a gain stage to provide increased swing signals from the resulting lower common mode signals and using a CMOS buffer to provide a CMOS output from the increased swing signals.

A sense amplifier latch that is operable to interface with high common-mode input voltages with wide ranges for all process variations. The sense amplifier latch comprises a cross-coupled latch having first and second rail signals; a pre-charge device; an equalization device; pass devices for enabling input devices to receive pad and reference inputs. In the present invention, the input devices comprise push-pull impedance dividers are used to preserve the input difference voltage while dramatically lowering the common-mode output voltage. The outputs of the impedance dividers are fed to the cross-coupled latch of the sense amplifier using n-channel pass gates.

The invention discloses a predictive control system and a method for reducing the common-mode voltage of a three-level VIENNA rectifier system, which are used for solving the problems of high common-mode voltage of the three-level VIENNA rectifier system in a wind power generation system, zero-crossing point distortion of an AC side current and unbalance of a DC side neutral point voltage. The algorithm limits the common-mode voltage of the system to a very low range. The coupling problem of current zero-crossing distortion and DC neutral-point voltage imbalance control is solved. By classifying the space voltage vectors, the computational complexity is greatly reduced. The algorithm does not need current inner loop controller and PWM modulation module, and avoids the design of complex controller and the selection of complex parameters. The system and method have characteristics of simpleness, directness and effectiveness, which makes the algorithm has high application value.

The invention discloses a midpoint voltage control and common mode voltage suppression method and system of a three-level inverter. The method comprises steps that through constructing virtual small vectors and medium vectors reasonably, the amount of change in the midpoint charge of each virtual vector is zero in one control period, and the vectors making the common mode voltage increase are eliminated to guarantee that the common mode voltage of the output voltage is minimized when the virtual vectors are constructed; a midpoint voltage balance factor is added based on the above, the midpoint voltage balance factor is adjusted by detecting voltage difference of upper and lower capacitors and the three-phase current in real time, and thereby the charge is made to flow into or out of the midpoint to adjust the midpoint voltage balance. The method is advantaged in that as the virtual vectors are reasonably constructed, and the midpoint voltage balance factor is further added, the virtual small vectors and the medium vectors are both variable, and the method has the feature of adjusting the midpoint voltage balance in the full modulation ratio range while reducing the common mode voltage.

The invention provides an SVPWM (Space Vector Pulse Width Modulation) control method for reducing the common-mode voltage of a six-phase motor, which relates to the technical field of multi-phase motor control. Voltage vector selection in an SVPWM control strategy for reducing the common-mode voltage is carried out based on voltage vector redundancy in six-phase motor control. Four proper effective voltage vectors are selected from a large number of vectors, and zero voltage vectors causing great change in amplitude of the common-mode voltage are processed. Through the SVPWM control method for reducing the common-mode voltage of a six-phase motor provided by the invention, the common-mode voltage at a stator node can be reduced greatly under the condition that the harmonic is not increased.

A matrix converter that can be used as part of a two-stage power converter has three ac three ac voltage lines AC1, AC2 and AC3 and two dc voltage lines DC1 and DC2. An array of six semiconductor switches 10a to 10f are arranged such that each of the three ac voltage lines AC1, AC2 an AC3 can be connected to one of the two dc voltage lines DC1 and DC2 when the associated switch is closed. A freewheel path is provided between the two dc voltage lines DC1 and DC2, which provides a fifth state of operation when all the switches 10a to 10f are open.

The invention relates to a modulation method capable of inhibiting a three-phase five-phase matrix converter common-mode voltage. An indirect conversion method is utilized, a three-phase five-phase matrix converter is equivalent to a virtual rectifier and a virtual inverter, for the virtual rectifier, an input phase voltage is divided into six zones, two linear voltages which are the largest ones and are positive in each zone are selected to synthesize to output a DC voltage, and no zero-voltage output occurs; for the virtual inverter, application space voltage vector modulation is realized, ten large vectors, ten middle vectors and two small vectors outputted by the virtual inverter are divided into ten sectors, only two large vectors and two middle vectors are selected from the sectors to synthesize a reference vector, and thereby a switch modulation mode of the virtual rectifier and the virtual inverter are respectively derived. As verified, on the conditions that, input and output are guaranteed to be sine waves and the input power factor is 1, so the common-mode voltage can be effectively reduced by 27.9%.

The invention relates to a control method for a frequency converter. The control method is characterized by comprising the following steps: a reference voltage vector is transformed from under a rectangular coordinate system to under a 60-degree coordinate system; a switch state and a switch state value of each basic voltage vector are calculated according to coordinates of the three basic voltage vectors; according to number of the switch states and the switch state values, the switch states with a relatively high common-mode voltage in the corresponding switch states of each delta-shaped region are eliminated; one delta-shaped region in which the reference voltage vectors are located under the 60-degree coordinate system is confirmed; a seven-segment type SVPWM modulation signal is formed according to the corresponding rest of the switch states of one delta-shaped region; and the seven-segment type SVPWM modulation signal is mapped into a driving signal used for driving a switch tube of the frequency converter so that the frequency converter is controlled. Redundant states of a switch are reduced, complexity degree of an algorithm is reduced, operation efficiency of the algorithm is enhanced and the common-mode voltage of the outputted voltage and switching frequency are reduced.

A differential buffer circuit includes a current source, a current sink, and a switching circuit connected to the current source at a first node and connected to the current sink at a second node. The switching circuit is operative to selectively control a direction of current flowing through differential outputs of the buffer circuit in response to at least a first control signal. The buffer circuit further includes a common mode detection circuit and a common mode control circuit. The common mode detection circuit is operative to detect an output common mode voltage of the buffer circuit and to generate a second control signal representative of the output common mode voltage. The common mode control circuit includes a first terminal connected to the current source and a second terminal connected to the current sink. The common mode control circuit is operative to selectively control the output common mode voltage of the buffer circuit as a function of the second control signal.

The invention discloses a control method of a clamping-type three-phase non-isolation photovoltaic inverter with a follow-current switch. The method comprises the following steps: generating preprocessing signals of six bridge arm switch tubes of the inverter by virtue of a three-phase sinusoidal wave signal and one triangular wave signal through intersecting, determining a state of the six preprocessing signals, and determining whether the inverter is in a non-follow-current switch state or a follow-current switch state; when the inverter is in a non-follow-current switch mode, performing three-phase SPWM modulating control on the six bridge arm switch tubes, and keeping a follow-current switch tube and two clamping switch tubes at an off state; and when the inverter is in a follow-current switch mode, keeping the six bridge arm switch tubes at an off state, connecting the follow-current switch tube, and selectively connecting the clamping switch tubes according to the situation. By adopting the control method, a step of feeding back energy to a power supply is saved, the conversion efficiency of the non-isolation photovoltaic inverter is improved, and the common-mode leaked current of the photovoltaic inverter is inhibited.

The invention discloses an elevator band-type brake power supply. The elevator band-type brake power supply is provided with a band-type brake coil pull-in voltage and sustaining voltage conversion circuit, a timer of a delayed step-down switching circuit (3) is triggered by means of the change of line current when a band-type brake coil is switched on, a current detection circuit (2) is connected with the delayed step-down switching circuit (3), the delayed step-down switching circuit (3) is connected with a PWM control and driving circuit (4), and the PWM control and driving circuit (4) is connected with a DC chopper circuit (5). Low-side current detection is adopted for the current detection circuit (2), and a current sampling resistor is connected to the negative electrode of the elevator band-type brake power supply in series.

To pass an ultra high-speed differential signal and make it difficult to pass a common mode noise. Lamped-constant differential delay line DL is formed by arranging inductors Lo, being passive series elements, and capacitors Co, being passive parallel elements, in a differential four terminal network of a ladder shape composed of the passive series elements and the passive parallel elements arranged in differential lines 1 and 3. The lumped-constant differential delay line DL is composed of capacitors Co including two capacitors Co / 2 and Co / 2, or Co and Co equivalent to the aforementioned capacitors, having equal values, and connected in series. Inductors L1 to L4 for attenuating a common mode noise are connected between connection points of the capacitors Co / 2 and Co / 2 or Co and Co connected in series, and a ground potential, so that attenuation poles are formed for attenuating the common mode noise together with the capacitors Co / 2 and Co.

The invention discloses a space vector pulse width modulation method used for a three-phase inverter. The space vector pulse width modulation method used for the three-phase inverter comprises the following steps: A) determining a sector where a set space voltage vector locates; B) determining two nonzero basic space vectors in the sector and determining two basic space vectors with the same amplitudes and opposite directions; C) determining action time of the two nonzero basic space vectors and the two basic space vectors with the same amplitudes and opposite directions in one switch period; and D) carrying out linear combination on the two nonzero basic space vectors and the two basic space vectors with the same amplitudes and opposite directions to from the set space voltage vector. With the technical scheme of the invention, since the generation mode of zero vector is thoroughly changed, common-mode interference can be reduced from the source of the common-mode interference, and common-mode voltage is reduced; and compared with the method for filtering EMI noise by utilizing an EMI filter, the cost is greatly reduced.

The invention relates to a control method and system intended to reduce the common-mode current in a power converter which comprises a rectifier stage (1, 1') connected to a number of input phases (R, S, T) and an inverter stage (2, 2') connected to a number of output phases (U, V, W). On each switching period, the rectifier stage (1, 1') and the inverter stage (2, 2') are controlled in a synchronized manner so that a variation of potential applied to an input phase (R, S, T) always corresponds to a variation of potential of the same sign applied to an output phase (U, V, W).

A common-mode shifting circuit for shifting the common-mode output voltage of a CML device to an arbitrary voltage is disclosed. A constant current source is provided at each output of the CML device. The constant current may be a positive or negative current, tending to raise or lower the common-mode output voltage, respectively. The constant current sources are preferably connected to an alternate voltage supply having a higher voltage than that the supply for the CML device. The invention further provides a method for adjusting the output signal of a current-mode logic circuit having two or more output ports, comprising the step of providing a constant current at each output port of the current-mode logic circuit, whereby the common-mode voltage at the output ports of said current-mode logic circuit is level-shifted.

The invention discloses a space vector modulation method based on a parallel current source type converter, which can simultaneously reduce the common mode voltage of the converter and realize the DCbridge arm current sharing. The method comprises: establishing a parallel current source type converter switching state current vector diagram by Clark transform, and classifying current vectors; calculating the common mode voltage corresponding to each current vector, and selecting a current vector with a lower common mode voltage for modulation; analyzing the redundancy state of each type of current vectors to point out a medium vector and a small vector for DC bridge arm current sharing; synthesizing a reference vector from a switching vector according to the principle of ampere-second balance, and selecting a redundant vector according to the bridge arm uneven current condition and the grid voltage state. The method uses a vector with a lower common mode voltage for synthesizing the reference vector, and performs current sharing control with a medium vector and small vector redundant switching state in each sampling period, thereby reducing the common mode voltage of the converterand realizing the DC bridge arm current sharing of the parallel current source type converter.

The invention discloses a switching power supply capable of reducing a low-frequency secondary-side common-mode voltage. The power supply mainly has two common-mode filtering circuit devices to prevent an AC voltage and an AC current from coupling to a secondary side of a transformer. Thus, the electrical safety and the quality in use of the associated electronic apparatus can be enhanced, a potential difference between the electronic apparatus and the ground may be greatly reduced, and an AC hum of a speaker coupled to an output of the power supply may be reduced or even eliminated.

The present invention relates to a circuit arrangement for reducing common-mode noise in a switched-mode power supply (300, 400), the circuit arrangement being coupled between a primary winding (302, 402, 502) and a secondary winding (303, 403, 503) of a transformer, the circuit arrangement comprising a first capacitor (309, 409) adapted to capacitively couple the primary winding (302, 402, 502) and the secondary winding (303, 403, 503). The circuit arrangement further comprises an auxiliary winding (304, 404, 504) and an impedance circuit (307, 308, 407, 408), said auxiliary winding (304, 404, 504) and said impedance circuit (307, 308, 407, 408) being coupled between the primary winding (302, 402, 502) and the first capacitor (309, 409). The invention also relates to a method for reducing common-mode noise in a switched- mode power supply, and a switched-mode power supply (300, 400).

The invention relates to a seven-level circuit, a grid-connected inverter and a modulation method and device of the seven-level circuit. The seven-level circuit comprises a DC boosted circuit and a symmetric dual-Buck circuit; the DC boosted circuit comprises a DC chopper and a fourth capacitor which are connected in series; an eighth switching tube is connected between the common terminal of the DC chopper and the fourth capacitor and the common terminal of a first switching tube and a first diode; the symmetric dual-Buck circuit comprises the following structures that a first capacitor and a second capacitor are connected in series and then connected to two sides of a DC power supply in parallel, the first diode and a second diode are connected in series and then connected with the DC power supply in parallel, the first switching tube is arranged between the first capacitor and the second diode, and a second switching tube is arranged between the second diode and the second capacitor; a first inductor is arranged between the first diode and the output end of the seven-level circuit, and a second inductor is arranged between the common terminal of the second switching tube and the second diode and the output end of the seven-level circuit; and a common point of the first capacitor and the second capacitor is connected with a common point of the first diode and the second diode. The seven-level circuit, the grid-connected inverter and a control method and device of the grid-connected inverter give consideration to two aspects of current and high efficiency.

The invention discloses an active neutral point clamped multi-level four-quadrant elevator driving system and a control method. The driving system comprises an active neutral point clamped four-quadrant frequency converter and a motor for driving an elevator transmission system. The control method of the invention selects a switching state with a minimum cost function as a switching state of a next switching period by predicting and comparing system states corresponding to various possible switching states of the frequency converter. The elevator driving system of the invention has the advantages of bidirectional power transmission capability, good power grid side waveform, high power factor, high efficiency and energy conservation. The corresponding control method is simple and can overcome switching time delay, and the system has parameter adaptation function and strong robustness.

The invention discloses a multifunctional space vector modulation method for a current-source converter. The method can compensate the system reactive power while reducing the common-mode voltage of the current-source converter, and comprises steps of 1, mapping the nine switching current states of the current-source converter to nine vector states in an [alpha][beta] space coordinate system according to the clark transform; 2, calculating the common-mode voltage corresponding to each vector, and providing a method of selecting a zero vector to reduce the system common-mode voltage; 3, transforming the voltage and current of the grid-connected point of the converter into the dq coordinates, controlling the active power and the reactive power of the system by controlling the d-axis currentand the q-axis current of the converter respectively, and accordingly determining a converter modulation reference vector; and 4, determining the three switch vectors of a composite reference vector based on an ampere-second balance principle, and then determining a zero-vector corresponding switch state according to the method in step 2. The modulation method realizes active power and reactive power independent control through the dq coordinate transformation, and uses the zero vector with the lowest common-mode voltage for synthesizing the reference vector to reduce the common-mode voltage of the system.

The invention relates to a multi-way MPPT photovoltaic inversion system which is technically characterized in that an inverter main circuit comprises a plurality of independent photovoltaic inversion units; a plurality of photovoltaic modules are connected with the corresponding photovoltaic inversion units via photovoltaic inversion unit direct current contactors and EMI (Electro-Magnetic Interference) filter circuits respectively; the photovoltaic inversion units are connected with a three-phrase power grid via an LCL (Lower Control Limit) filter circuit; the inverter control circuit is formed by connecting a main station control system and a plurality of slave station control systems; each photovoltaic inversion unit acquires respective alternating current inlet wire current, direct current voltage and direct current; and power grid voltage is acquired by the main station control system of the inverter control circuit and transmitted to the slave station control systems for common use at high speed. The system employs a high-speed communication manner between a main station and a slave station to achieve an inversion output carrier function, and reduces common mode voltage between inverters, the stability and reliability of the system are improved, common mode current through a PV (Photovoltaic) array is reduced, and the service life of a battery board is prolonged.

The invention discloses an improved model predicted control method. A voltage and a 90-degree delayed signal thereof are used in an alphabeta static coordinate system, and a rectifier leg voltage reference value is obtained via a mathematical model of the three-phase three-level eight-switch NPC rectifier, nine spatial voltage vectors of the three-phase three-level eight-switch NPC rectifier are reduced to seven voltage vectors by removing voltage vectors causing a high common-mode voltage; according to an objective function, an optimal spatial voltage vector enabling the optimal objective function is selected; and the obtained optimal spatial voltage vector serves as a switch function of a next control period, the state of a switch tube is controlled, the operation state of the circuit iscontrolled, and a control target of three-phase there-level eight switches in the wind power generation system under the AC input voltage unbalanced condition is achieved. The algorithm is simple, visual and clear, control is simple and accurate, and the practical value is high.

The invention discloses an eddy current displacement sensing probe suitable for strong electromagnetic field interference and a bridge circuit. The sensing probe is composed of a detecting coil, a quartz spacer and a balancing coil. The difference between the vertical distance of the detecting coil and the balancing coil and a target conductor enables the parametric variation of the characteristics of the two coils to form difference on sensitivity of distance changes of the target conductor, the spatial positions of the detecting coil and the balancing coil are close to enable induced electromotive force formed on the two coils by the strong electromagnetic field interference of the environment to be close. The bridge circuit is composed of an excitation signal source, a balanced bridge,a high-pass filter and an instrument amplifier, the induced electromotive force formed by the strong electromagnetic field interference of the environment is offset by the balanced bridge, and the high-pass filter is used for further attenuating the difference of the induced electromotive force on the two coils. The eddy current displacement sensing probe suitable for the strong electromagnetic field interference and the bridge circuit abandon a traditional electromagnetic shielding mode, and are suitable for realizing high-resolution displacement and vibration measurement under a strong electromagnetic field interference environment such as large motors and switch equipment.

The invention provides a seven-level circuit. The seven-level circuit comprises a direct current boosted circuit and a symmetrical double Buck circuit, wherein the direct current boosted circuit comprises: a fourth capacitor and a direct current chopper are connected with a direct current power supply in parallel, and an eighth switch tube is connected between the common terminal of a second switch tube and a second diode and the common terminal of the direct current chopper and a fourth capacitor; the symmetrical double Buck circuit comprises: a first capacitor and a second capacitor are connected in series and then are connected with the two sides of the direct current power supply in parallel, a first diode and a second diode are connected in series and then are connected with the direct current power supply in parallel, a first switch tube is arranged between the first capacitor and the first diode, and a second switch tube is arranged between the second diode and the second capacitor; a first inductor is arranged between the first diode and the output end of the seven-level circuit; a second inductor is arranged between the common terminal of the second switch tube and the second diode and the output end of the seven-level circuit; and the common point of the first capacitor and the second capacitor is connected with the common point of the first diode and the second diode. The invention provides the seven-level circuit, a grid-connected inverter and a modulation method and a modulation device for the grid-connected inverter, which takes leakage current and high efficiency into consideration.

A self-balanced modulation method and a closed-loop magnetic flux rebalancing control method for parallel multilevel inverters. The combination of the two methods provides for balancing of the magnetic flux of the inter-cell transformers (ICTs) of the parallel multilevel inverters without deteriorating the quality of the output voltage. In various embodiments a parallel multi-level inverter modulator is provide including a multi-channel comparator to generate a multiplexed digitized ideal waveform for a parallel multi-level inverter and a finite state machine (FSM) module coupled to the parallel multi-channel comparator, the FSM module to receive the multiplexed digitized ideal waveform and to generate a pulse width modulated gate-drive signal for each switching device of the parallel multi-level inverter. The system and method provides for optimization of the output voltage spectrum without influence the magnetic balancing.