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1091results about "Angle demodulation" patented technology

Inductive data and power link suitable for integration

A system providing an inductive power and data link between an external transmitter and miniature internal receiver is presented. The system is suited to applications where the receiver must be of a small size and the system must consume very little power, such as an implanted biomedical device. The system is also compatible with systems where bi-directional communications are required. The novel transmitter and receiver form an improved forward data telemetry system. The transmitter consists of a Class-E converter with its optimum operating frequency being synchronously, instantaneously and efficiently altered in accordance with the data to be transmitted, thereby producing an FSK modulated magnetic field of substantially constant amplitude. The constant amplitude output allows for the continuous, data-independent transfer of power to the miniature receiver and its associated electronics. The present invention also represents an improvement over the high efficiency Class-E converters previously patented by the inventors. The receiver consists of a coil and an integrated rectifying system to recover operating power from the incident magnetic field, as well as an FSK demodulator whose operation is based on the multiphase comparison of charging times of integrated capacitors. The described FSK demodulator approach removes deleterious effects resulting from low-frequency changes in the transmitter frequency, and eliminates time distortion artifacts generated by circuit imbalances and asymmetries in the power recovery process. The combination of the transmitter and receiver improvements yields a reliable data transfer system unaffected by circuit imbalances and incidental variations in the amplitude and frequency of the magnetic field.
Owner:LUNA NEURO LLC

Error recovery within processing stages of an integrated circuit

An integrated circuit includes a plurality of processing stages each including processing logic 1014 , a non-delayed signal-capture element 1016 , a delayed signal-capture element 1018 and a comparator 1024 . The non-delayed signal-capture element 1016 captures an output from the processing logic 1014 at a non-delayed capture time. At a later delayed capture time, the delayed signal-capture element 1018 also captures a value from the processing logic 1014 . An error detection circuit 1026 and error correction circuit 1028 detect and correct random errors in the delayed value and supplies an error-checked delayed value to the comparator 1024 . The comparator 1024 compares the error-checked delayed value and the non-delayed value and if they are not equal this indicates that the non-delayed value was captured too soon and should be replaced by the error-checked delayed value. The non-delayed value is passed to the subsequent processing stage immediately following its capture and accordingly error recovery mechanisms are used to suppress the erroneous processing which has occurred by the subsequent processing stages, such as gating the clock and allowing the correct signal values to propagate through the subsequent processing logic before restarting the clock. The operating parameters of the integrated circuit, such as the clock frequency, the operating voltage, the body biased voltage, temperature and the like are adjusted so as to maintain a finite non-zero error rate in a manner that increases overall performance.
Owner:ARM LTD +1
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