The invention provides a method for improving the performance of a stacked DRAM cache, and proposes a line buffer manager to help shorten the access delay of the stacked DRAM cache and accelerate data access, thereby improving performance. The present invention includes the following steps: S1, propose a line buffer manager, which includes a line state table, the line state table includes a plurality of line state entries, and each line state entry includes an activation bit, a tag value sequence, a tag value filling bit and a waiting request In order to describe the state of a memory row data; S2, the row buffer manager is connected with the data access request queue, and the row buffer manager updates the information of the row status table according to the data access request arriving in the data access request queue; S3, The row buffer manager is connected to the cache controller, and the row buffer manager receives the command from the cache controller and updates the information of the row status table; S4, the row buffer sends the stacked DRAM buffer through the cache controller to the stacked DRAM cache according to the information of the row status table. control commands.