The invention discloses an
assembly line scheduling device, which comprises three physical
assembly lines, two mix buffers and a
bus pipe bus, and is characterized in that the three physical assemblylines are logically divided into five
assembly lines, and the five assembly lines respectively correspond to five stages of
processing messages in a
chip, i.e., a parse stage, a bridge stage, a routerstage, a post stage and an egress stage; the two mix buffers are used for scheduling different services and then sending the different services to the corresponding logic assembly lines; and each pipeline unit
pipe, the mix buffer and the pdsrc are hung on the
bus pipe bus and are used for completing the interaction among the pipeline units. According to the invention, various services are optimized in the aspect of
assembly line processing length, and different services can correspond to different
processing lengths, so that unnecessary processing is reduced; the pipe bus is used for replacing the original connection relationship among the members of the
assembly line, so that the members of the
assembly line are connected more flexibly, the expandability is very high, and the new requirements in the future can be met. The invention further provides a corresponding assembly line scheduling method.