37results about How to "Simplify the patterning process" patented technology

An optoelectronic display comprising a plurality of pixels, each pixel comprising a plurality of sub-pixels, wherein the optoelectronic display comprises a colour-forming layer which is patterned providing a plurality of discrete colour-forming regions in a two-dimensional array, and wherein an addressing array is provided for addressing the discrete colour-forming regions, at least some of the discrete colour-forming regions having portions which are separately addressable by the addressing array, each portion defining a sub-pixel of the optoelectronic display.

A method of fabricating a semiconductor using a fin field effect transistor (FINFET) is disclosed. In a particular embodiment, a method includes depositing, on a silicon substrate, a first dummy structure having a first sidewall and a second sidewall separated by a first width. The method also includes depositing, on the silicon substrate, a second dummy structure concurrently with depositing the first dummy structure. The second dummy structure has a third sidewall and a fourth sidewall that are separated by a second width. The second width is substantially greater than the first width. The first dummy structure is used to form a first pair of fins separated by approximately the first width. The second dummy structure is used to form a second pair of fins separated by approximately the second width.

A method for performing a liftoff operation involves printing a liftoff pattern using low-resolution patterning techniques to form fine feature patterns. The resulting feature size is defined by the spacing between printed patterns rather than the printed pattern size. By controlling the cross-sectional profile of the printed liftoff pattern, mask structures may be formed from the liftoff operation having beneficial etch-mask aperture profiles. For example, a multi-layer printed liftoff pattern can be used to create converging aperture profiles in a patterned layer. The patterned layer can then be used as an etch mask, where the converging aperture profiles result in desirable diverging etched features.

An optoelectronic display comprising a plurality of pixels, each pixel comprising a plurality of sub-pixels, wherein the optoelectronic display comprises a colour-forming layer which is patterned providing a plurality of discrete colour-forming regions in a two-dimensional array, and wherein an addressing array is provided for addressing the discrete colour-forming regions, at least some of the discrete colour-forming regions having portions which are separately addressable by the addressing array, each portion defining a sub-pixel of the optoelectronic display.

A method for forming a pattern includes forming a resist pattern on a printing roll, printing a multi-stepped resist pattern on an etching object layer formed on a substrate by using the printing roll and etching the etching object layer by using the printed resist pattern as a mask.

A method of producing an electron emission device having a low threshold electric field needed to emit electrons without unintentional electron emission includes a first step of preparing a first conductive film, second conductive film, and a material which constitutes an electron emission part connected to the first conductive film, and a second step of setting a threshold electric field strength, which is needed to start electron emission in a situation where a higher electric potential is applied to the first conductive film than that applied to the second conductive film, to a value greater than a threshold electric field strength, which is needed to start electron emission in a situation where a higher electric potential is applied to the second conductive film than that applied to the first conductive film.

The invention provides a semiconductor structure and a forming method thereof. The method comprises: providing a substrate, wherein the substrate comprising a first region, a plurality of second regions and a plurality of third regions, the first region is located between two adjacent third regions, two sides of the first region are respectively provided with one second region, and each second region is located between the first region and the third region; forming a pattern structure on the substrate, wherein the pattern structure comprises a first pattern layer located on the first region, asecond pattern layer located on the second region and a third pattern layer located on the third region, the first pattern layer and the second pattern layer are discrete from each other, and the second pattern layer and the third pattern layer are discrete from each other; removing the second pattern layer; and after the second pattern layer is removed, etching the substrate by taking the firstpattern layer and the third pattern layer as masks to form a base, a first fin part located on the base and a second fin part located on the base, wherein the first fin part is formed by etching by taking the first pattern layer as a mask, and the third fin part is formed by etching by taking the third pattern layer as a mask. According to the invention, the performance of the formed semiconductorstructure is improved.

A method of manufacturing a thin film transistor is capable of enhancing pattern precision of an organic semiconductor layer and simplifying a patterning process. The method includes forming an organic insulating film on a substrate and forming a bank having the first and second concave portions and a third concave portion in the organic insulating film, the third concave portion being formed on the first and second concave portions. The method further includes forming a source electrode and a drain electrode in the first and second concave portions and forming an active layer in the third concave portion, the active layer contacting the source electrode and the drain electrode.