This invention discloses an ASIC
chip with an energy response self-calibration module, comprising a multi-pixel channel array containing N independent pixel channels. Each pixel channel includes a charge-sensitive
amplifier module, a shaping circuit, a
pulse energy discrimination module, and a counting module. The
pulse energy discrimination module has a built-in
comparator. The
chip also includes an energy response self-calibration module, comprising a
test pulse generator, a reference
voltage control submodule, and a calibration
logic control submodule. By controlling the
pulse height and the magnitude of the reference
voltage Vref, the S-curves of each pixel channel corresponding to different
test pulse heights are obtained. Based on a preset
calibration algorithm, the polynomial coefficients of the reference
voltage and the calibrated DAC value for each pixel channel are calculated and stored. This invention enables consistent energy response across all pixel channels of the ASIC, and allows the calibration coefficients to be read after self-calibration to determine the differences between the ASIC channels.