The present application relates to a
semiconductor device with an isolation structure, and a manufacturing method for an isolation structure. The
semiconductor device comprises: a substrate (110); a first doped region (112), which is located on the substrate (110), wherein the
doping concentration of the first doped region (112) is below the
doping concentration of the substrate (110); a
junction isolation structure, which comprises a first buried region (122), and a second buried region (124) which is in direct contact with the first buried region (122), wherein the first buried region (122) is located on the first doped region (112), the second buried region (124) is located on the first buried region (122), and the
doping concentration of the second buried region (124) is below the doping concentration of the first buried region (122); a second doped region (130), which is located on the second buried region (124); and a device
body region (140), which is located in the second doped region (130). In the present application, a hole
barrier layer is formed on surfaces of the first buried region and second buried region, such that holes can be prevented from passing through the hole
barrier layer to transit to the substrate to cause substrate electric leakage, thereby improving the latch-up effect of a device. Moreover, since a first doped region is provided, the width of an effective base region can be increased by using a base widening effect, thereby effectively reducing parasitic leakage flowing into a substrate.