This application discloses a power-on reset circuit, control method, driver
chip, device, and storage medium. The circuit includes: a first detection module and a power supply judgment
logic module. The first input terminal of the first detection module is connected to the medium-
voltage power supply of the driver
chip, the second input terminal is connected to the low-
voltage power supply of the driver
chip, and the output terminal is connected to the first input terminal of the power supply judgment
logic module. The second input terminal of the power supply judgment
logic module is connected to the low-
voltage power supply. The first detection module is used to determine an output level indicating whether the medium-voltage power supply has completed power-on based on the
current voltage value of the low-voltage power supply and the
current voltage value of the medium-voltage power supply. The power supply judgment logic module is used to determine an enable
signal indicating whether both the medium-voltage power supply and the low-voltage power supply have completed power-on based on the
current voltage value of the low-voltage power supply and the output level of the first detection module.