The invention relates to an anti-single-particle reinforced P-GaN
transistor with a periodic PN junction laminated gate structure, and belongs to the technical field of
semiconductor devices. The
transistor comprises a substrate; a buffer layer formed on the surface of the substrate; a
barrier layer formed on the surface of the buffer layer; the source
electrode is formed on the surface of the
barrier layer; the drain
electrode is formed on the surface of the
barrier layer; the P-GaN layer is formed on the surface of the barrier layer and is positioned between the source
electrode and the drain electrode; the periodic PN junction laminated gate structure is formed on the surface of the P-GaN layer; the grid electrode is formed on the surface of the periodic PN junction laminated gate structure; and the
passivation layer is formed on the surfaces of the barrier layer, the source electrode and the drain electrode. Through the built-in
electric field formed by the PN junction between the P-GaN layer and the grid electrode, effective constraint on a large number of electrons generated by incidence of heavy ions from the grid electrode is realized, and instantaneous current in the device is reduced, so that the single-particle burning
voltage of the device is remarkably improved, and the reliability and the performance of the device are enhanced.