4 results about "Mixed cell" patented technology

Methods for characterizing genome editing, clonal expansion and associated reagents for use in such methods are disclosed herein. Some embodiments of the technology are directed to characterizing a population of cells following an engineered genomic editing event, that includes in some embodiments characterizing genomic alterations occurring at both intended and unintended genomic loci within the genome of the populations of cells. Other embodiments are directed to utilizing Duplex Sequencing for assessing a clonal selection in mixed cell populations and / or cell populations following a genomic editing event. Further examples of the present technology are directed to methods for detecting and assessing clonal expansion of cells following a genomic editing event.

The present invention relates to a cell population of spiral ganglion neural progenitors (SGNPs) and methods how to isolate these cells from an in-vitro mixed cell population. The cell population expresses one or more markers, wherein the one or more marker is CXCR4, SUSD2, LPAR3, EPHA5, CHRNA3, REEP1, NPFFR2, SORCS3, NFASC, GABRB3, KCNB2, GRM8, DLL3, and / or KCNH8.

Semiconductor structures are provided. A semiconductor structure includes a cell array. The cell array includes a first regular cell, a second regular cell and a first mixed cell. Each P-type transistor has a first threshold voltage and each N-type transistor has a second threshold voltage in the first regular cell. Each P-type transistor has a third threshold voltage and each N-type transistor has a fourth threshold voltage in the second regular cell. Each P-type transistor has the first threshold voltage and each N-type transistor has the fourth threshold voltage in the first mixed cell. The first regular cell, the second regular cell and the first mixed cell are arranged in the same row of the cell array. The first mixed cell is arranged between the first and second regular cells and is in contact with the first regular cell.

A semiconductor device includes: first and second cell regions including corresponding active regions (ARs) in which are formed components of transistors. The first cell region includes first and second ARs having a first height The second cell region includes third and fourth ARs having a second height taller than the first height, and a fifth AR having a third height taller than the second height. The transistors of the first and second cell regions are arranged to function as a D flip-flop (DFF) including a primary latch and a secondary latch. The primary latch includes a first sleepy inverter and a first non-sleepy (NS) inverter. The secondary latch includes a second sleepy inverter and a second NS inverter. Transistors which comprise the first and second NS inverters are in the first cell region. Transistors which comprise the first and second sleepy inverters are in the second cell region.