88 results about "Software work" patented technology

A programmable logic unit (e.g., an ASIC or FPGA) having a feedforward linear associative memory (LAM) neural network checking circuit which classifies input vectors to a faulty hardware block as either good or not good and, when a new input vector is classified as not good, blocks a corresponding output vector of the faulty hardware block, enables a software work-around for the new input vector, and accepts the software work-around input as the output vector of the programmable logic circuit. The feedforward LAM neural network checking circuit has a weight matrix whose elements are based on a set of known bad input vectors for said faulty hardware block. The feedforward LAM neural network checking circuit may update the weight matrix online using one or more additional bad input vectors. A discrete Hopfield algorithm is used to calculate the weight matrix W. The feedforward LAM neural network checking circuit calculates an output vector a(m) by multiplying the weight matrix W by the new input vector b(m), that is, a(m)=wb(m), adjusts elements of the output vector a(m) by respective thresholds, and processes the elements using a plurality of non-linear units to provide an output of 1 when a given adjusted element is positive, and provide an output of 0 when a given adjusted element is not positive. If a vector constructed of the outputs of these non-linear units matches with an entry in a content-addressable memory (CAM) storing the set of known bad vectors (a CAM hit), then the new input vector is classified as not good.

Methods and / or systems and / or apparatus for improved security in information processing systems provide secure control transfer and object-oriented programming support at an architectural level using hardware readable data structures that represent different object structures in order to securely switch context. An architectural level Object-Oriented Programming (OOP) processor allows OOP software to be directly mapped into hardware and object security can be enforced not only in software, but also in hardware. The processor performs security checks for objects and eliminates most of the software work for access checking. In some embodiments, a hardware or hardware-like (e.g., firmware) device is used for communication and access control, to compute instructions, with a mapping mechanism of access control for object-oriented computing, through operand descriptor tables to describe the access control based on the object-orientation requirements, such as private, public, package, or protected, etc. The hardware emulates an object-orientation environment, to provide object management, object-oriented memory management, etc.

This invention discloses a method for testing errors of a single board including: 1, setting a heartbeat signal register on the board and operating on it on line, 2, writing specific heartbeat values alternatively in the register in a period of time, 3, FPGA fetches the heartbeat values and outputs the heartbeat signals to a test bus, 4, judging if the software works normally, if so, the work is continued, otherwise, it writes in abnormal heartbeat value or stops writing the value in the register to execute step 7, 5, carrying out writing and reading operation to the register in a main service chip and comparing if the values are consistent to judge if said chip works normally, 6, if so, the work is continued, otherwise, it writes the abnormal value or stops writing the value in the register, 7, judging if the signal is all right, if so, it returns to step 2, otherwise, the error of the single board is output.

The invention provides a computer built-in with a wireless module and a standby method and an activation method thereof. The activation method comprises: computer activation is started; the wireless module sends a signal which requests to activate the computer; a control circuit detects, analyses and determines the signal which requests to activate the computer and sends the control signal which activates the computer to the computer; and the computer responses the control signal and is activated. The invention can realize that the computer can continuously provide the power supply for the wireless module under the condition of standby; when voice or data is called in, the computer can detect a voice or data signal, analyzes the signal, judges the signal, automatically awakens a computer system in extremely short time after finding a correct signal, restores normal hardware and software work environment and makes corresponding ringing hint, and thus the computer can quickly answer the phone or receive and send short messages; the problem of computer power consumption can be solved, and standby time is improved to 5 days or even longer from 2-8 hours of the original battery power supply time.

The invention discloses a method and device for identifying failure modes of software, and relates to the technical field of the internet. The method comprises the steps that a preset requirement model of the construction software is divided into a software external interface model, a software function model, a software working state model and a software system dependence relation model; the independent function failure mode of the software, the function combination failure mode of the software and the state transition failure mode of the software are analyzed on the basis of the models; software failures caused by software working state conversion and multiple function combinations are fully embodied, the software failure modes can be analyzed comprehensively, and the method has the advantages of being universal, easy to popularize and capable of being copied. Therefore, real causes and potential threats of the software failures are found in the software development process, the improvement of the safety design level in the software development stage is effectively promoted, the pertinence and the effectiveness of correction measures are enhanced, the safety of software products is improved, and the equipment damage caused by the software failures and the cost of the life cycle of the software are reduced.

The invention discloses a high-performance network data processing platform system comprising a service board card with a Cavium processor, an X86 management board card and a 2-slot ATCA (Advanced Telecom Computing Architecture) case. The layer 2 address learning functions of a switch chip and the port of a network data processor are closed so that address learning conflict with the port of an inserted card can be prevented, and in the meantime, hardware shares one part of software work based on the enough strong performance of the switch chip in a software-hardware combined way and by virtue of distributed system deployment, and as a result, unnecessary expenditure of the network data processor is saved and the core service processing performance of the network data processor is enhanced.

The invention discloses a method and system to realize mandatory reduction of single-desk, which core is: a system acquires the corresponding reduction information according to the demands of different components, and transforms the information to boundary scan device BS in the single-desk with function of logic or dealing through system bus on the backplane. Based on the reduction information, the BS device takes induction on the corresponding device. Under the conditions of abnormal single-desk business and normal dog-software working, this invention can achieve the reduction of single-desk through standard system bus. Moreover, it's more flexible to achieve reduction through system bus, and doesn't need software support to take reduction when the single-desk appears unknown breakdown.

A programmable logic unit (e.g., an ASIC or FPGA) having a feedforward linear associative memory (LAM) neural network checking circuit which classifies input vectors to a faulty hardware block as either good or not good and, when a new input vector is classified as not good, blocks a corresponding output vector of the faulty hardware block, enables a software work-around for the new input vector, and accepts the software work-around input as the output vector of the programmable logic circuit. The feedforward LAM neural network checking circuit has a weight matrix whose elements are based on a set of known bad input vectors for said faulty hardware block. The feedforward LAM neural network checking circuit may update the weight matrix online using one or more additional bad input vectors. A discrete Hopfield algorithm is used to calculate the weight matrix W. The feedforward LAM neural network checking circuit calculates an output vector a(m) by multiplying the weight matrix W by the new input vector b(m), that is, a(m)=Wb(m), adjusts elements of the output vector a(m) by respective thresholds, and processes the elements using a plurality of non-linear units to provide an output of 1 when a given adjusted element is positive, and provide an output of 0 when a given adjusted element is not positive. If a vector constructed of the outputs of these non-linear units matches with an entry in a content-addressable memory (CAM) storing the set of known bad vectors (a CAM hit), then the new input vector is classified as not good.

The invention discloses a software tool configuration type integrated expansion calling method and system. A whole set of software integration XML representation standards and uniform calling protocols are designed. By aid of the standards, the calling protocols and the object oriented technology, a series of processes of description, calling and deployment of different software tools are completed, and finally the configuration integration of software tools is realized. A uniform method is used for calling the software tools. The expandable design and the characteristic of supporting local and remote of the method and system can effectively reduce the cost for developing different software tools, and can reduce enterprise cost through deploying software on site to complete software work. The capability of promoting normalization and integration in the integration aspect of software is improved. The network type construction technology adopted by the method and system also enables the uniform calling technology to meet the increasingly developing requirements of network application and the cloud computing technology, and necessary basic protocols and component support are supplied for increasingly wide networks and cloud computing relevant software.

The invention provides a Power platform-based trusted computer design method and control and operation method. A trusted computer comprises a power source (PowerOn), a trusted platform control module (TPCM), a base-board management controller module (BMC), a central processing unit module (CPU), base-board management controller firmware (BMC firmware), and central processing unit firmware. When the system power source (PowerOn) is electrified, the trusted platform control module (TPCM) starts automatically and controls other module power sources of the system. By performing trust measurement on modules, measurement for the base-board management controller module (BMC) and the system PNOR and control to a power source of the base-board management controller module (BMC) and the system power source are achieved, so that problems about computer terminal and network security are solved from the bottom layer, the reliability is improved and workload of software is reduced.

The invention discloses a credible encryption system and method. The credible encryption system comprises a credible computing platform and a U-Key type trust root, the U-Key type trust root serves asa trust chain starting point of the credible computing platform and is used for supporting the credibility measurement work and the encryption and decryption work of the credible computing platform,and the trusted computing platform comprises a trusted software base and an encryption software. According to the credible encryption system and method provided by the invention, the security of dataduring the encryption and decryption process is ensured by adopting an active immune mechanism; the working security of the encryption software can be ensured; the security policy can be stored in theU-key type trust root, the U-key type trust root provides a secure storage area for secure storage, and the security protection of the virtual disk is provided for the encrypted plaintext, so that the security of the data during the encryption and decryption process can be ensured.

The invention concerns a process to protect a vulnerable software working on a data processing system against its unauthorized usage using a processing and memorizing unit. The process comprises defining: 1) at least one software execution characteristic, liable to be monitored at least in part in a processing and memorizing unit 2) at least one criterion to abide by for at least one software execution characteristic 3) detection means to implement in a processing and memorizing unit and enabling to detect that at least one software execution characteristic does not abide by at least one associated criterion 4) coercion means to implement in a processing and memorizing unit and enabling to inform the data processing system and / or modify the execution of a software when at least one criterion is not abided by.