A method for realizing multi-serial-port extension by using an FPGA (field programmable gate array) includes the steps: connecting a processor with the FPGA through a parallel bus, a DSP (digital signal processor) data line and an address line; constructing a serial port top control module and defining registers for configuring working modes of serial ports, wherein the serial port top control module comprises nine registers for being configured by a DSP, five status registers for returning to current operating conditions of the serial ports and registers for configuring Baud rate; and completing operation of the registers by means of coordination of the processor and the FPGA and through the parallel bus, the DSP data line and the address line, so that a serial port extension function is realized. The method is capable of realizing UART (universal asynchronous receiver / transmitter) interface extension based on the parallel bus and has the advantages of small size, low power consumption, high reliability, high safety, low systematic cost and the like, and all functions of a special serial-port extension chip are achieved.