32results about How to "Less circuitry" patented technology

The circuit size of a diversity receiver for an orthogonal frequency division multiplexing signal is reduced, and the diversity effect is increased, by providing a power ratio comparator that calculates a difference value as a ratio of powers derived from channel estimation results for subcarrier components received from two antennas (11), (21) and compares the calculated difference value with a predetermined threshold, and a selective / equal gain combining selector (33) that outputs one of the received demodulated signals when the comparison result indicates that the calculated difference value is greater than the threshold value.

The invention relates to a power supply device having several switch-mode power supplies connected in parallel to supply at least one consuming unit, each switch-mode power supply generating an output current I0 and an output voltage U0(I0, RL) that is a function of the output current I0 and a load resistance RL, and having a control device for each switch-mode power supply, the control device having a first stage with a P element (54) that receives a P element input voltage which is derived from the output voltage U0(I0, RL), and generates a P element control voltage UVS, that is used to control the respective switch-mode power supply, the first stage being active when 0≦I0≦I0P, a second stage having a current reproduction circuit which reproduces the output current I0 of the respective switch-mode power supply and generates an output current control voltage UP which is used to control the respective switch-mode power supply, the second stage being active when I0P≦I0≦I0S, and a third stage having an amplifier circuit which amplifies a signal proportional to the output current I0 and generates an amplified output current control voltage m·US which is used to control the respective switch-mode power supply, the third stage being active when I0S≦I0≦IK.

A method of performing a scaled sum-of-product operation in a processor in response to multiply-and-accumulate (MAC) instructions. The method includes accessing a first number, accessing a second number, and accessing a shift value. The first number is multiplied by the second number, the resulting product comprising a third number that includes a most significant portion and a least significant portion. The method includes executing a first MAC instruction, executing a second MAC instruction, and storing a final result of the scaled sum-of-product operation. Executing the first MAC instruction comprises right-shifting the least significant portion of the third number according to the shift value; accessing a least significant portion of a fourth number; and adding the right-shifted least significant portion of the third number to the least significant portion of the fourth number, the resulting sum comprising a least significant portion of the final result of the scaled sum-of-product operation.

Pixel circuits, capable of operating in either “snapshot” or “rolling integration” mode, and compatible with a conformal photodiode coating. Preferred embodiments of the present invention are compatible with these coating materials, as well as others, including amorphous Silicon. The preferred pixel circuits includes additional transistors not provided in prior art pixel circuits to divert leakage current away from integration nodes when not integrating, to reset the integration node, and to buffer and select the integrated voltage.