35results about How to "Small margin" patented technology

Data errors in non-volatile memory inevitably increase with usage and with higher density of bits stored per cell. The memory is configured to have a first portion operating with less error but of lower density storage, and a second portion operating with a higher density but less robust storage. An error management provides reading and checking the copy after copying to the second portion. If the copy has excessive error bits, it is repeated in a different location either in the second or first portion. The reading and checking of the copy is accelerated by reading only a sample of it. The sample is selected from a subset of the copy having its own ECC and estimated to represent a worst error rate among the copy it is sampling. One embodiment has the sample taken from one bit of each multi-bit memory cell of a group.

The present invention is a memory circuit, comprises: a memory cell array including a plurality of bit lines, a plurality of word lines, and a plurality of memory cells disposed in the positions of intersection between the bit lines and the word lines; and a page buffer, which is connected to the bit line and which detects memory cell data by judging with predetermined sense timing the potential of the bit line when a pre-charged bit line potential is discharged in accordance to a cell current of a selected memory cell. Further the sense timing differs in accordance with the position of the selected memory cell in the memory cell array.

A method, a client device and a synchronization server are described for enabling synchronization of data processing by a first and second receiver wherein the method may comprise: said first receiver processing data units of a first broadcast stream, a play-out delay Δt_p defining a time interval between transmission of a data unit to said first receiver and the processing of said data unit by said first receiver; initiating transmission of data units of a second broadcast stream to said second receiver, a common timeline correlating one or more data unit in said first stream with one or more corresponding data unit in said second stream; and, selecting one or more data units from a plurality of stored data units corresponding to said second stream, wherein at least part of said selected data units have corresponding data units of said first stream that have been transmitted to said first receiver but that have not been processed by said first receiver due to said play-out delay.

There is provided a disc changer for a disc drive unit, including: a disc accommodation section capable of accommodating plural discs: a disc pushing mechanism that pushes a disc from a specific rack of the disc accommodation section to a disc discharge position within the disc drive unit; and a disc discharge mechanism that securely sends the disc at the disc discharge position, to a disc insertion/discharge opening of the disc drive unit. The disc exchanger further includes a disc guiding device that has: an upper and a lower guiding members, which are provided in an area within the disc drive unit adjacent to the disc insertion/discharge opening, and guide the disc pushed by the pushing mechanism, to the disc insertion/discharge opening; and a drive mechanism of the guiding members, that opens the lower guiding member from the upper guiding member, when the pushing mechanism pushes the disc.

To provide a manufacturing method of a semiconductor device with a reduced chip area by reducing the size of a pattern for forming an integrated circuit. For example, the size of an IC chip that is provided as an application of IC cards or IC tags can be reduced. The manufacturing method includes the steps of forming a gate electrode; forming an insulating layer over the gate electrode; and forming an opening in the insulating layer. One or both of the step of forming the gate electrode and the step of forming the opening in the insulating layer is/are conducted by a lithography process using a phase-shift mask or a hologram mask. Accordingly, micropatterns can be formed even over a substrate with low planarity such as a glass substrate.

A semiconductor device having a two-layer well structure and a small margin required at the boundary of a well region and comprising a substrate-bias variable transistor and a DTMOS. Field effect transistors (223) are formed on a P-type shallow well region (212). The depth of a shallow device isolation region (214) on the P-type shallow well region (212) is less than the depth of the junction between an N-type deep well region (227) and the P-type shallow well region (212). Therefore the field effect transistors (223) share the P-type shallow well region (212). The P-type shallow well regions (212) independently of each other are easily formed since they are isolated from each other by a deep device isolation region (226) and the N-type deep well region (227).

The invention discloses a backward extrusion process of a long cylindrical bushing by using a non-standard low-speed press. The process comprises the following steps of: (a) blanking and heating; (b) profiling; (c) carrying out shallow punching; and (d) carrying out backward extrusion, wherein the press used in a step (b) to a step (d) is the non-standard low-speed press, and the work speed is not greater than 40mm/s; the diameter of a chamber of a profiling die in the step (b) is phi b, the diameter of a chamber of a shallow punching die in a step (c) is phi c, the diameter of a chamber of a backward extrusion die in the step (d) is phi d, and phi b is equal to phi c is equal to phi d; the diameter of a shallow punch in the step (c) is phi 1, the diameter of a backward extrusion punch in the step (d) is phi 2, and phi 1 is equal to phi 2; the shallow punching depth in the step (c) is Lc, the backward extrusion depth in the step (d) is Ld, and Lc is smaller than or equal to Ld/2. The process has the characteristics of stable product quality, low tool, raw material and kinetic energy consumption and the like.

The invention discloses multi-feed flexible DC transmission reactive power control method and device. The method comprises the following steps: calculating a margin parameter Kq1 of a reactive power coordinating controller of each converter based on the absolute value of the reactive power output by each converter and the maximum reactive power value of each converter when that the voltage value of an AC bus is beyond the first preset value is detected; regulating the reactive power output of each inverter through the margin parameter Kq1. According to the method and device, each converter is able to coordinate the output reactive power according to relative margin (difference between the maximum reactive power output by the converter and the absolute value of measured reactive power of the converter under a rated working condition) when the reactive power load of the AC bus is increased, so as to enable the sum of the reactive power output by all the converters to be maintained within the allowable range of the voltage of the AC bus; meanwhile, the converter with high margin can output more reactive power, and the converter with small margin can output less reactive power.

Automated tissue stiffness measurement devices and methods can identify cancerous lesions with high sensitivity and specificity. Systems and methods are presented to measure tissue stiffness using applied force, illumination and imaging techniques. The systems and methods can use structured illumination to characterize a tissue surface.

A print controller sets, in response to reception of an inquiry related to dimensions of unprintable area as an area not allowing printing of a document from a document data creating unit, dimensions of the unprintable area to default values or values smaller than the default values. The set dimensions of the unprintable area are notified to a document data processing unit, print data is formed based on data received from the document data processing unit and the dimensions of the unprintable area, and a print instruction is given to a printing device.

A method for manufacturing an optical disc and a method for transporting a multi-layered optical disc are provided. When adhering the sheet and the disc substrate, after the adhesive is supplied to the outer side of the groove on the disc substrate, the sheet is loaded on the disc substrate. The adhesive is pressed to extend to the groove. At this timer, because the surplus adhesive is blocked when flowing into the groove, the surplus adhesive does not overflow easily toward the inner side of the groove. In addition, even if the adhesive overflows toward the inner side of the groove the adhesive is kept between the non-adhered portion of the sheet and the disc substrate, preventing the adhesive from moving to the disc surface. The non-adhered portion is cut by the cutting blade after the adhesive is completely cured, and then removed from the disc substrate.

Disclosed herein is a scan optimizer system and method designed to generate optimal ATE input/output timing with small margin but yielding stable results. Therefore the scan test time is greatly improved.

A target path generation device is provided with a controller for generating the target path for an autonomous vehicle. The controller performs a method that includes acquiring travel path boundaries of a road in a host vehicle surroundings; determining a presence or absence of an occupant; generating a first target path with regards to the travel path boundaries upon determining that the occupant is present; generating a second target path with regards to the travel path boundaries upon determining no occupant is present; and imparting a difference in the target path between the first target path and the second target path when traveling on a curved road.

The embodiment of the invention discloses a grain storage method of a tall and flat warehouse. The method comprises the following steps: acquiring data parameters of a warehouse, a warehouse gate, to-be-stored grains and binning equipment; according to the data parameters, determining a position that a grain discharging opening of the binning equipment can reach in the warehouse, and determining grain bulk morphology at each point in the warehouse; determining an operable path in the warehouse, dividing the operable path into m operable stations, and setting an exit station; based on locationsof the operable stations and the exit station, obtaining multiple grain storage paths by virtue of an ant colony algorithm; and according to a predetermined target, selecting an optimal grain storagepath. Therefore, transfer probability of each operable hole location in the warehouse towards the exit station is calculated by virtue of the ant colony algorithm, and then the optimal grain storagepath is selected according to the predetermined target, so that binning quantity of a binning machine is high when grain storage is performed in the warehouse, a warehouse supplementing quantity is low, grain surface is flat, and grain surface flattening workload is less.