72 results about "System-level simulation" patented technology

The invention discloses a system level simulation method for a CoMP (coordinated multi-point) technique in an LTE-A (long term evolution-advanced) system. The method comprises the following steps of: generating needed simulation scene information according to the IMT-A (international mobile telecommunication-advanced) requirement; obtaining a corresponding channel matrix according to the scene information; adding a CoMP algorithm module; carrying out coordination user division and resource block distribution; carrying out virtual resource block transmission according to the result of resourcescheduling; and finally recording the stimulation result, and carrying out performance evaluation. In the invention, the manner of threshold is adopted to distinguish cooperative users and non-cooperative users, and the proportion fair-share scheduling algorithm is adopted to schedule the resource blocks. By adopting the method provided by the invention, a CoMP system model can be simplified, so that the simulation difficulty brought by the factors, such as the uncertainty of cooperative cell and the like in the CoMP technique can be solved.

The invention discloses a simulation test method and simulation test equipment. The method comprises the following steps of: acquiring field data of a mobile communication system; processing the obtained field data to obtain data applicable to a simulation test; introducing the data obtained by processing into a simulation test system; and carrying out a system-level simulation test by using the simulation test system. By adopting the simulation test method and the simulation test equipment disclosed by the invention, simulation evaluation results are closer to a real scene of the mobile communication system.

Integration of a system-level simulation with one or more hardware device simulations is accomplished using a mapping layer, which allows the system-level simulation to interact with the hardware device simulation at a pin level, an object level, and an abstract level. The overall simulation may operate with respect to a clock or timing device or it may operate with respect to transactions.

A system-level simulation of hardware devices utilizes interconnection objects to facilitate communication between a simulated device and the system, or between different simulated devices. A device may send output data to the interconnection object and/or receive input from the interconnection object. Additionally, the interconnection object may have some data-validation capability for incoming and outgoing data.

The invention discloses a spacecraft multi-stage driving rigid-flexible coupling response acquisition method, which comprises steps: (1) the spacecraft is considered to be composed of three structures: a body, parts and joints; (2) kinetic energy and potential energy of the body, the parts and the joints are built respectively; (3) according to a connection condition, kinetic energy and potential energy of the entire spacecraft are built; (4) the kinetic energy and the potential energy of the spacecraft obtained in the third step are used, and a Lagrange equation is adopted to build a kinetic equation of the spacecraft; (5) the kinetic equation obtained in the fourth step is solved, and a rigid-flexible coupling kinetic response of the spacecraft during the multi-stage driving process is acquired. The method of the invention can be applied to a complex spacecraft with flexible multi-body motion features, a precise kinetic response to the motion process of the spacecraft of the complex multi-body structure is acquired, and an important role is played in control system design and system level simulation verification.

The invention provides a system-level simulation demonstration and verification system oriented to satellite mobile communication. Various basic models for users to build required satellite mobile communication system scenes can be provided for the users, and design requirements of the users for different network environments are met. The system comprises a simulation model base module, simulation function realization modules and a network collection management module. The simulation model base module is used for providing satellite mobile communication simulation models. The simulation function realization modules call corresponding simulation models from the simulation model base module to achieve the simulation function and each comprise three sub-modules including a network satellite mobile communication network topology management module, a satellite mobile communication link computation and mapping module and a satellite mobile communication protocol simulation module. The network collection management module is used for combining and scheduling the three sub-modules in each simulation function realization module so that the three simulation function realization modules can be matched to achieve the simulation function. The network satellite mobile communication network topology management module is subjected to wireless resource management.

The invention discloses a relative device for receiving and processing navigation satellite reflected signal, uses the parallel multi-passage relative module as the core, according to the CPU configuration information, gives relative power outputs at various chip/Doppler time for reflected signal. Parallel multi-passage relative module is controlled by passage configuration module, and is connected with time-base generator, UART interface and DSP interface, every module accepts logistic control of reset control. The device ensures early software development of design, modeling, system-level simulation, IP core integration, and combined verification, and is suitable for various receiver systems and design of configuration function. The invention can process GPS direct signal and reflected signal at the same time, uses direct signal to navigate and position, outputs the power relating to reflected signal under the control of DSP at various delay times.

Systems and methods for performing multi-message transaction based performance simulations of SoC IP cores within a Network on Chip (NoC) interconnect architecture by accurately imitating full SoC behavior are described. The example implementations involve simulations to evaluate and detect NoC behavior based on execution of multiple transactions at different rates/times/intervals, wherein each transaction can contain one or more messages, with each message being associated with a source agent and a destination agent. Each message can also be associated with multiple parameters such as rate, size, value, latency, among other like parameters that can be configured to indicate the execution of the transaction by a simulator to simulate a real-time scenario for generating performance reports for the NoC interconnect.

The invention provides a modeling and packaging method for process tolerance and electric performance coupling characteristics in radio frequency integration. The method starts from development and application of process IP models to put forward an integrated scheme which is compatible with existing modeling algorithms and rapidly and correctly realizes model development, integrated packaging andupdating maintenance by utilizing data of electromagnetic simulation combined test, and the integrated scheme is particularly suitable for modeling and simulation of process tolerance and electric performance coupling characteristics in radio frequency microwave integration. According to the method, processing and modeling are carried out on process tolerance data in integrated manufacturing, andmanufacture process levels are truly fed back to designers for calling through a standard IP library form, so that system-level simulation can cover analysis of process tolerance, the simulation is capable of rapidly and effectively verifying influences, on system performance, of the process manufacturing levels, and benefit is brought to shorten the design verification period.

The invention discloses a method for building a satellite navigation system test verification and test assessment mathematic model. The method comprises the steps of S1: driven by function and performance verification/assessment of verification, design, construction and application stages of a satellite navigation system, determining a verification/test and assessment project of the satellite navigation system, and forming a verification/test and assessment method for a to-be-tested item; S2: according to driving data, determining a satellite navigation physical system or entity generating the driving data; performing abstraction on a satellite navigation physical system entity/function to form a system level simulation model, wherein the model is a basis of a satellite navigation system test verification and test assessment mathematic model system; and S3: after a satellite navigation system verification/test and assessment model and the system level simulation model are built, performing self-closing verification, and performing abstraction on self-closing verification item and method to form a self-closing verification model. The method has the advantages of simple principle, easy realization, good effect and the like.

The invention relates to an SINR (Signal Interference-to-Noise Ratio) estimation method based on DFT-S-GMC (Discrete Fourier Transform Spread Generalized Multi-Carrier) system multiple antenna diversity schemes. The effective signal interference-to-noise ratio for the DFT-S-GMC multiple antenna diversity scheme can be calculated accurately in a way that: a mathematical model for signal input and output in the DFT-S-GMC system is constructed firstly, then according to channel frequency response, channel noise variance and equilibrium approaches, an equilibrium factor of a frequency-domain equalization sub-carrier in the DFT-S-GMC system is set up; average power of the wanted signal of the DFT-S-GMC system receiving end, average power and noise variance of inter-signal interference are calculated respectively based on the mathematical model and the frequency-domain equilibrium factor; then the effective signal interference-to-noise ratio is calculated. The invention can be used for both mapping interfaces from link-level simulation to system-level simulation for the DFT-S-GMC multiple antenna diversity transmission scheme, and the link adaptation technology and wireless resource scheduling technique, etc. providing support for Adaptive Coding Modulation based on the transmission scheme.

The invention relates to an attack trapping system based on firmware simulation. The attack trapping system comprises the following steps: (1) obtaining and analyzing firmware; (2) for the firmware information obtained in the step (1), using a QEMU simulator to simulate target firmware through a system-level simulation technology; (3) on the basis of the step (2), constructing a honeypot system, deploying a high-interaction honeypot system based on an SSH proxy protocol in a virtualization environment, and performing information configuration; and (4) on the basis of the step (3), performing attack behavior capture, monitoring various attack behavior characteristics of the equipment in real time in the honeypot, and capturing information such as an attack initiating way of an attacker andthe like. According to the invention, analog simulation is carried out on the firmware through the QEMU simulator, and the honeypot environment based on the SSH protocol is deployed by using the virtualization technology, so that various attack behaviors for the equipment can be effectively monitored in real time, malicious attacks can be captured, and a more efficient and complete system securityprotection system can be constructed.

A wireless network emulation system undersamples log files when the conditions represented in the log files would require a faster refresh rate than the channel emulator can provide. A representative sample may be selected based on number of channel taps, delay spread, maximum value, or being first, last or otherwise identifiable within a group. The RF information from the selected sample is utilized as being representative of a group of related samples for a given time period corresponding to the refresh rate of the channel emulator.

The invention discloses a method for extracting base parasitic resistance from HBT (Heterojunction Bipolar Transistor)components. The method includes steps: 1, utilizing an emitter polycrystalline silicon with rectangular and circular cross section, through the shielding of the rectangular and circular emitter polycrystalline silicon, to form a connecting resistance of a germanium-silicon polycrystalline silicon; taking different values of strip width and length of the rectangular and circular emitter polycrystalline silicon to obtain a group of linear change values, and calculating accurate resistance value by fitting on a component model; 2, opening a rectangular and circular emitter region window at the rectangular and circular emitter polycrystalline silicon to form a base window resistance of the germanium-silicon polycrystalline silicon, taking different values of strip width and length of the rectangular and circular emitter region window to obtain a group of linear change values, and calculating accurate resistance value by fitting on a component model. The invention can accurately extract SiGe Poly parasitic resistances and effectively improve accuracy of the component model, therefore a better instruction for system-level simulation is provided.

The present invention discloses a cycle-count-accurate (CCA) processor modeling, which can achieve high simulation speeds while maintaining timing accuracy of the system simulation. The CCA processor modeling includes a pipeline subsystem model and a cache subsystem model with accurate cycle with accurate cycle count information and guarantees accurate timing and functional behaviors on processor interface. The CCA processor modeling further includes a branch predictor and a bus interface (BIF) to predict the branch of pipeline execution behavior (PEB) and to simulate the data accesses between the processor and the external components via an external bus, respectively. The experimental results show that the CCA processor modeling performs 50 times faster than the corresponding Cycle-accurate (CA) model while providing the same cycle count information as the target RTL model.

The invention relates to a system-level simulation test environment construction method based on DDS, which comprises the following steps: constructing an instruction set simulation model, and providing a virtual target machine model for a system-level simulation test environment in combination with a virtual peripheral equipment model; constructing a communication protocol simulator model based on a configurable communication protocol in a plug-in mode, and selecting functional components according to test requirements; defining a communication data object between the virtual target machine and the communication protocol simulator, packaging according to a data specification of the DDS, binding a data writer and a data reader, and covering all communication interface data between the virtual target machine and the communication protocol simulator; dynamically accessing the virtual target machine and the communication protocol simulator based on a DDS distributed co-simulation bus, establishing communication connection, binding the virtual target machine and the communication protocol simulator with a theme, and setting a communication mode for data exchange; carrying out multi-node time synchronization on the virtual target machine and the communication protocol simulator; carrying out system characteristic state acquisition and analysis.

The invention discloses a parallel structure based coordinated network system-level simulation method. The method mainly includes the following steps that (1) a system-level simulation platform allocates multiple snapshot-simulation dynamic conditions of a coordinated communication system to a distributed computing server to realize parallel computing; (2) specific to the snapshot simulation transmission process of each stand-alone system, a fixed collaboration mode is adopted to determine collaboration sets, and parallel stand-alone simulation calculation is performed on each collaboration set; (3) in consideration of inter-cell interference probability distribution characteristics, influences on users due to small-scale interference values of neighboring cells can be averaged, so that an interference computation module long in consumed time references to an interference computation value of a previous time slot or before multiple time slots, and the users of different cells can compute current signal to interference plus noise ratios thereof through a parallel mode. The method has the advantages that by the aid of multi-layer parallel design from outside to inside, system simulation speed and efficiency can be increased to the uttermost degree, computing resources are utilized effectively, and reliability in simulation results is ensured to be unchanged.

The invention discloses a system-level simulation platform for satellite mobile communication and a construction method, the architecture of the simulation platform comprises a storage management layer, a configuration management layer, an intermediate adaptation layer and a statistical analysis layer, and the construction method comprises the following steps: constructing a satellite mobile communication-oriented system-level simulation platform architecture; analyzing a configuration management model of the simulation platform according to the simulation platform architecture; modeling the core communication node to generate a satellite model, a terminal node model and a gateway station model; and designing a work flow of the simulation platform. The method has the advantages that the method is suitable for multi-satellite, multi-station, multi-beam, multi-link and multi-user free networking; a new reference is provided for simulation verification of a satellite mobile communicationsystem protocol system and a key technology, and meanwhile flexible networking, system argumentation, protocol design and key technology verification of multiple satellites, multiple stations, multiple beams, multiple links and multiple users in the satellite mobile communication system are supported.

The invention discloses a Doppler effect implementation method of a wireless channel simulator based on 5G, and the method comprises the following steps: setting relatively reasonable channel half-wavelength sampling density SD, and dividing the relative motion distance of a mobile terminal into a plurality of sampling segments, wherein fc is a carrier frequency, and c is a light speed; and calculating a channel impact response matrix h on each position segment according to a channel matrix formula of a 5G fading model to obtain a channel matrix sequence h1 on the motion trail. According to the invention, the Doppler effect of a 5G channel model is realized in a hardware simulator, the Doppler frequency shift and Doppler spread of system-level simulation of a complex scene are accurately simulated on the basis of controllable complexity and calculated amount, and a good harmonic suppression effect is achieved.

The invention discloses a stability control system multifunctional detection terminal, and relates to the technical field of electric power system simulation test. The multifunctional detection terminal comprises an analog stability tester, a digital stability tester and matching test software. Current or voltage analog quantity signals and switching quantity signals are provided through the analog stability tester so as to meet functional unit testing of a stability control device to be tested. The motion behavior of a stability control main station or sub-station is independently simulated through the digital stability tester, and the digital stability tester is connected with the stability control device to be tested and the matching test software through the network so that testing of the stability control system dynamic characteristics can be realized without cooperation of the superior stability control main station. According to the multifunctional detection terminal, closed-loop testing of the equipment level of the stability control device can be completed, and system level simulation test verification can also be performed on the complete stability control configuration scheme and the expected dynamic behavior thereof.

A system-level description that specifies functions performed by the components and interactions thereamong is divided into a plurality of functional blocks, each corresponding to a component. At least one of the functional blocks is selectively replaced with an optimized equivalent functional block, and the functional blocks and the at least one optimized equivalent functional block are interconnected in a manner consistent with the system-level description.