The invention discloses a method for reducing an LDPC decoding delay based on error characteristics of flash memory pages. As the manufacturing process of an MLC NAND flash memory is improved, the size of memory cells becomes smaller and coupling interference between the cells becomes stronger, as a result, a high bit error rate is caused, and the high bit error rate seriously affects the reliability of data. LDPC codes with a high error correction capability are widely used to ensure the data reliability. However, when the LDPC codes are used, an MSB page and an LSB page of the MLC NAND flash memory have unbalanced decoding delays, the decoding delay of the LSB page is higher than the decoding delay of the MSB page, and since the LSB page has a quite high bit error rate, the reading performance of an MLC flash memory is poor. According to the invention, favorable information is provided for LSB page decoding according to a decoding result of the MSB page and a save error mode so that the decoding delay of the LSB page is reduced, the decoding delay gap between the two pages is narrowed, and the reading performance of the MLC flash memory is improved.