To prevent, in a multilayer wiring board to which a 
semiconductor chip is flip-
chip bonded, occurrence of cracks in the board at portions adjacent to 
electrode pads due to a difference in 
thermal expansion coefficient between the 
semiconductor chip and the board. A multilayer wiring board (20) of the present invention has features that 
electrode pads (22) corresponding to electrodes of a 
semiconductor chip (25) located near an outer periphery (29) of the 
semiconductor chip each have an oblong shape, openings (35) of a solder 
resist (23) are each smaller than the oblong shape, and the center (B) of the opening is located to be offset from the center (A) of the oblong shape by a distance (L4) in a direction (30) toward the center of the 
semiconductor chip. Therefore, in the multilayer wiring board of the present invention, thermal stresses applied to portions (L3) of the 
electrode pads (22) on the board near the outer periphery of the 
semiconductor chip are relaxed. Consequently, the multilayer wiring board of the present invention can prevent occurrence of cracks in the board at portions adjacent to the electrode pads near the outer periphery of the semiconductor chip due to a difference in 
thermal expansion coefficient between the semiconductor chip and the board.