63 results about "Bias tee" patented technology

The invention discloses a method and a device for implementing a Ramsey-CPT atomic clock by microwave On-Off modulation VCSEL. The method comprises the following steps of: A, coupling direct current and microwave to a laser tube, scanning the direct current to obtain a plurality of absorption peaks and locking the direct current; B, switching on and off the microwave to realize equivalent laser pulse, and scanning the microwave to obtain Ramsey-CPT stripes; and C, locking the microwave to obtain stable frequency output. The device is characterized in that: a current source is connected with a Bias-Tee, a microwave source is connected with the Bias-Tee through a microwave switch, the Bias-Tee is connected to a laser generating device, the output laser passes through a physical system and then enters a laser detection device, and control equipment is connected with the current source, the microwave source, the microwave switch and the laser detection device respectively. The method and the device realize laser-atom periodic interaction through microwave On-Off, have a more predominant frequency discrimination curve compared with the traditional CPT scheme, and implements the atomic block with higher stability. Compared with the Ramsey-CPT atomic clock implemented by using the AOM with larger volume and higher power consumption, the device has a simple structure, adopts a unique method, is easy for microminiaturization, and overcomes the key technology of the chip Ramsey-CPT atomic clock.

Accordingly, a preferred embodiment of the present invention comprises an electro-optical device having an optical waveguide that includes two optical pathways, wherein the optical waveguide is embedded within the substrate. A bias electrode layer is formed on the surface of the substrate. A buffer layer is formed on at least a portion of the bias electrode layer and the surface of the substrate. An RF electrode layer is formed on the buffer layer. A bias-tee electrically couples the bias electrode layer and the RF electrode layer.

A miniature wideband bias tee that has a small package size. The bias tee has a low temperature co-fired ceramic substrate with a top surface and a bottom surface. A first inductor is located within the substrate. A second inductor is attached to the top surface and has a core with a wire wound on the core. Terminals are located on the top and bottom surfaces. Ends of the wire are connected to terminals on the top surface. A capacitor is mounted to terminals on the top surface. Several vias extend through the substrate and electrically connect the terminals to the inductor and capacitor.

The Invention comprises a method and Interface for powering and controlling an antenna, having an RF signal input, an AISG signal input, including a DC current, wherein the RF signal input is coupled to the antenna by a filter, so the filter blocks a signal with DC current, and the AISG signal is coupled to the antenna through a switch, so that if an AISG signal is present, the switch automatically allows the AISG signal through to the antenna for control of the antenna, and if no AISG signal is present, the RF signal is automatically allowed through to the antenna for control of the antenna.

A power amplifier (PA) system includes an amplifying transistor having a base, a collector, and an emitter. The PA system further includes a radio-frequency (RF) input configured to receive an RF input signal having an RF component and a DC bias component, a bias circuit coupled to the base of the amplifying transistor, and a bias tee circuit configured to receive the RF input signal and pass at least a portion of the DC component to the bias circuit and at least a portion of the RF component to the base of the amplifying transistor.

In an FET-characteristic measuring method, a predetermined bias voltage output from an output terminal of a bias tee is applied to the drain of an FET, and a pulse output from a pulse generator is applied to the gate thereof to thereby cause drain current to be generated. The drain current is converted by a load impedance, connected to an AC output terminal of the bias tee, into a voltage pulse, and is measured based on the voltage pulse. The method includes increasing the bias voltage by an amount corresponding to a voltage drop caused by the load impedance and repeating measurement of a value of the voltage pulse a predetermined number of times, and applying extrapolation to the last two values of the voltage-pulse values obtained by the predetermined number of repeated measurements to determine a drain voltage to be applied to the FET.