17 results about "Diode voltage" patented technology

This invention discloses an LLC resonant converter with a wide output voltage range based on a voltage doubler rectifier, applicable to DC fast charging of new energy vehicles. The converter achieves primary-side inversion and secondary-side rectification topology reconfiguration through switch drive signals, enabling wide-range voltage output in four operating modes. The primary side can switch between half-bridge and full-bridge inversion modes, while the secondary side can switch between full-bridge, voltage doubler, and voltage quadruple rectifier modes. This invention reduces diode voltage stress, possesses self-balancing capability of the voltage doubler capacitor, and achieves soft switching across the entire voltage range. Ultra-wide voltage gain is achieved within a narrow frequency adjustment range across the entire voltage range through simple pulse frequency modulation (PFM), allowing the converter to adapt to the charging needs of new energy vehicles with different voltage platforms.

The utility model provides a silicon carbide MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) capable of reducing the voltage drop of a body diode. The lower side surface of an epitaxial layer is connected to the upper side surface of a silicon carbide substrate; a first groove is formed in the epitaxial layer; the P-type base region is arranged in the first groove, and a second groove is formed in the P-type base region; the N + source region is arranged in the second groove; the P + source region is arranged in the second groove, and the outer side surface of the P + source region is connected to the inner side surface of the N + source region; the lower side surface of the gate oxide layer is connected to the N + source region, the P-type base region and the epitaxial layer; the lower side surface of the polycrystalline silicon electrode layer is connected to the upper side surface of the gate oxide layer; the lower side surface of the first contact metal layer is connected to the N + source region; the lower side surface of the second contact metal layer is connected to the P + source region, and the second contact metal layer is connected to the first contact metal layer; the metal work function of the first contact metal layer is smaller than that of the second contact metal layer; and on the basis of reducing the on resistance, the forward voltage drop of the body diode is reduced, and the loss of the MOSFET when being applied in a circuit is also reduced.

An electrostatic discharge protection device includes a diode, a voltage clamping component, an electronic component, a first pin, and a second pin. The diode includes a first doped area of a first conductivity type and a second doped area of a second conductivity type opposite to the first conductivity type. The voltage clamping component is electrically connected to the first doped area. The electronic component includes a first region of the first conductivity type, a second region of the second conductivity type, a third region of the first conductivity type, and a fourth region of the second conductivity type. The first region is electrically connected to the second doped area. The second region is electrically connected to the first doped area and the voltage clamping component. The fourth region is electrically connected to the voltage clamping component.

A method (100) for determining a channel resistance value of an electronic semiconductor switching element (M1) is disclosed, comprising: determining a diagnostic voltage value (U) DESAT ) (110) based on a provided diode voltage value (U) D,DESAT ) of a diode (D DESAT ) a diagnostic circuit (20); and a determination of the channel resistance value (R) DS ) (120) based on a calculation of the diagnostic voltage value (U DESAT ), a provided evaluation voltage value (V DESAT ) the diagnostic circuit (20) and a provided load current value (I LOAD ) of the electronic semiconductor switching element (M1). Also disclosed is a computing unit (30) configured to execute the method and an electronic circuit device (10) with the computing unit (30).

This invention discloses an apparatus for measuring oxygen saturation. The apparatus includes a circuit system configured to: measure a first diode voltage at a light-emitting diode (LED) when a first current is applied through the LED; measure a second diode voltage at the LED when a second current is applied through the LED; and measure a third diode voltage at the LED when a third current is applied through the LED. The circuit system is further configured to: determine a series resistance based on the first, second, and third diode voltages; and determine the intensity of a received photon signal corresponding to an output photon signal generated using the LED. The circuit system is further configured to determine the oxygen saturation level based on the intensity of the received photon signal and the series resistance.

Provided herein is a bandgap reference circuit comprising: a proportional to absolute temperature (PTAT) voltage circuit configured to generate a PTAT voltage; and a bandgap voltage circuit comprising a diode, the bandgap voltage circuit configured to: receive the PTAT voltage from the PTAT voltage circuit; and combining the PTAT voltage with a diode voltage across the diode to output a bandgap reference voltage.

This invention belongs to the field of power electronic converter technology and discloses an automatic current-sharing high-gain boost converter and its application in photovoltaic charging devices. This automatic current-sharing high-gain boost converter employs two different voltage multiplier units, inserted at the midpoint of the bridge arm of a two-phase interleaved parallel circuit, and then cascaded with a half-wave rectifier circuit. This ensures that each inductor discharge circuit contains (m+n+1) diodes, thereby automatically achieving inductor current sharing. Furthermore, it achieves a voltage gain of 2(m+n+1) / (1-D) with a relatively small number of components, and features low switching transistor voltage stress, low diode voltage stress, low input current ripple, and common ground drive for all switching transistors. The boost requirements can be flexibly met by freely matching the number of switched capacitors n and m in the boost unit.

The invention provides a soft switching arc welding power supply topology with low-stress and anti-fatigue characteristics. The soft switching arc welding power supply topology comprises a direct-current voltage source, a voltage stabilizing circuit, a phase-shifted full-bridge circuit, a high-frequency transformer, a full-wave rectifying circuit, a high-speed chopper circuit and a resonance current complementary circuit which are connected in sequence, the phase-shifted full-bridge circuit comprises a leading bridge arm and a lagging bridge arm; the midpoint A of the leading bridge arm is connected with the midpoint B of the lagging bridge arm through a primary winding of the high-frequency transformer; the resonance current complementary circuit comprises an auxiliary transformer Ta, an inductor La and a non-polar capacitor Ca; the primary side of the auxiliary transformer Ta is connected to the midpoint A and one end of the inductor La, the secondary side of the auxiliary transformer Ta is connected to the midpoint B and one end of the inductor La, and the other end of the inductor La is connected with the negative electrode of the direct-current voltage source through the capacitor Ca. According to the power supply topology, zero-voltage switching commutation operation of all SiC MOSFET power devices in the whole load current range can be realized, and the duty ratio loss and the rectifier diode voltage spike are reduced.

This application provides a short-circuit identification method for water pump frequency converters based on the IGBT body diode voltage drop slope, applied to the short-circuit protection system of a water pump frequency converter controller. The method includes: real-time capture of the collector-emitter forward voltage drop signal generated by the lower arm insulated gate bipolar transistor during the inductive load freewheeling phase; continuous discrete voltage sampling at a preset sampling frequency during the effective freewheeling period; obtaining the instantaneous voltage drop change rate between adjacent sampling points through digital differential logic; comparing the absolute value of the instantaneous voltage drop change rate with a preset critical slope threshold and a time window threshold to perform dual determination; and triggering a hardware logic blocking drive signal when a short-circuit fault is detected at the output terminal.

This invention belongs to the field of pressure measurement technology for large-cavity presses, and discloses a pressure calibration method for large-cavity presses based on diode constant current mode and a differential stress phase change pressure measurement method. The differential stress phase change pressure measurement method provided by this invention fixes two diodes to a second pressure-transmitting medium and the analyte, respectively. While performing an oil pressure test using a large-cavity press, a calibration current is applied to the two diodes. The voltage changes of the two diodes are compared to obtain a differential signal, and the abrupt change interval in the differential signal is identified. Based on the diode voltage signal used as a reference channel, combined with the "cavity pressure - diode voltage" standard curve, the cavity pressure range of the abrupt change interval is obtained. This invention eliminates the reliance on bulky sensing elements and additional structural characterization facilities, achieving simple, low-cost, in-situ, and continuous pressure monitoring during actual functional experiments, and also expands the range of measurement objects.

The invention discloses an input current estimation method and device for a four-switch Buck-Boost circuit, and the method comprises the following steps: obtaining a freewheel diode voltage drop, a conduction voltage drop and an inductance equivalent impedance of a power tube, and constructing an inductance current-equivalent impedance mapping table; performing high-speed sampling on the input voltage, the output voltage and the inductive current; judging the working modes of the circuit based on the transformation ratio coefficient of the input and output voltage, wherein the working modes comprise a Buck mode, a Boost mode and a critical state mode; in the Buck mode, the input current estimation formula is compensated based on the actual duty ratio, the fly-wheel diode voltage drop, the conduction voltage drop and the inductance impedance; and in the critical state region of the Buck and Boost modes, continuous compensation calculation is carried out on the input current according to a critical state inductive current model. According to the invention, the precision and stability of input current estimation in a CCM mode (continuous conduction mode) and a DCM mode (discontinuous conduction mode) are remarkably improved, and a reliable and low-cost input port monitoring scheme is provided for an industrial-grade four-switch Buck-Boost circuit.

The embodiment of the invention provides a trap characterization method and device for a SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device based on a body diode, and the method comprises the steps: 1, connecting the SiC MOSFET device in a constant-temperature environment through test equipment; step 2, grid electrode filling voltage and drain electrode voltage are applied to the SiC MOSFET device through test equipment, and trap filling is carried out on the SiC MOSFET device; 3, applying a grid test voltage and a body diode test current in a trap release stage through test equipment, and measuring a transient response curve of the body diode voltage; 4, repeating the steps 1-3, and obtaining a plurality of transient voltage curves at different temperatures; and step 5, carrying out fitting processing on the plurality of transient voltage curves, extracting a time constant spectrum of a trap, and calculating a trap energy level by adopting an Arrhenius formula based on the time constant spectrum of the trap so as to carry out trap characterization.

The application provides a SiCMOSFET switching loss collaborative optimization method and system based on dynamic threshold regulation. By analyzing the transient slope evolution path of the gate-source voltage, the first-order inflection point moment is extracted as a time anchor point associated with the diode voltage drop to reverse the influence of the junction temperature. The net gate charge decay trend represents the process and aging effect, and then generates a double-point asymmetric judgment point that evolves with the real-time state of the device. Combined with the carrier transport phase characteristics, the opening is advanced and the closing is delayed, so that the driving action is accurately embedded in the real physical window of the channel conductance establishment and depletion. As a result, the opening trigger occurs at the critical point of the channel electron before the effective injection, and the closing trigger maintains to the end of the channel carrier dominant depletion stage, significantly compresses the overlapping area, suppresses the Miller platform tail and voltage overshoot, reduces the single switching energy loss from the root, and improves the operation robustness of the system in a wide temperature range and the whole life cycle.

A bandgap reference circuit comprising: a proportional to absolute temperature, PTAT, voltage circuit configured to generate a PTAT voltage; and a bandgap voltage circuit comprising a diode, the bandgap voltage circuit configured to: receive the PTAT voltage from the PTAT voltage circuit; and combine the PTAT voltage with a diode voltage across the diode to output a bandgap reference voltage.

This invention relates to the field of photovoltaic power generation technology, and discloses a two-stage inverter and photovoltaic system for photovoltaic power generation. The two-stage inverter includes an input inductor branch, a switching transistor branch, a diode branch, an output capacitor branch, a clamping capacitor branch, and a half-bridge inverter unit. In use, the three nodes of the two capacitors in the output capacitor branch form a three-level output structure, eliminating the need for additional windings. Furthermore, capacitor C6 can be clamped together with the capacitors and the first-end diode in the clamping capacitor branch, reducing the number of capacitors required for clamping and decreasing the voltage stress on the diode. Additionally, the input inductor branch, clamping capacitor branch, first-end diode, capacitor C6, and capacitor C7 form a zero-input current ripple structure, which can reduce the inductance, size, and cost of the inductor in the input inductor branch. Moreover, since the zero-input current ripple structure shares components with the diode branch and the clamping capacitor branch, the number of components in this invention can be reduced.

The application discloses a control system and a control method for avoiding saturation of an instantaneous filter, and the control system comprises a filter circuit, a rectifier circuit, an inverter circuit, an input voltage detection circuit and a control circuit, wherein the control circuit is used for controlling the inverter circuit to output a pulse width modulation signal when the input voltage of the filter circuit is within a preset zero point range. The control system for avoiding saturation of the instantaneous filter can detect the value of the input grid voltage, and only when the grid voltage is within the preset zero point range, the inverter circuit is controlled to output the pulse width modulation signal. Since the value of the grid voltage in the preset zero point range is small, the input grid voltage is low, the diode voltage drop is high, the voltage variation amplitude of the enabled instantaneous Y capacitor is small, and the saturation of the filter and the surge of the ground current can be effectively avoided.

A circuit topology for measuring current over a wide dynamic range using multiple series sense resistors and diode voltage clamping is described. A current sense network uses a diode clamping technique to reduce the voltage drop across the series network such that it can be used in a power supply circuit with minimal impact on output voltage regulation. The circuit topology allows for overlapping current measurement ranges that can be merged together to provide a wide dynamic range. The circuit topology does not dynamically switch current sense resistors (or capacitors) and avoids unintended noise injection caused by such switching, and is suitable for measuring a wide dynamic range of current in real time.