This invention relates to the field of drive circuit technology, and discloses a highly reliable gate drive circuit, drive
chip, and
power semiconductor device. The circuit breaks through the existing passive compromise scheme that relies solely on adjusting the turn-off
resistor. It uses a detection unit to collect the
gate voltage of the IGBT unit in real time, a latch unit to output a stable
square wave signal when the
voltage reaches a preset threshold, and a pull-down unit to simultaneously provide a low-impedance
discharge path, actively suppressing abnormal
gate voltage rise caused by the
Miller effect. The design of the Miller suppression unit avoids the switching
speed reduction and device overheating problems caused by increasing the turn-off
resistor, while effectively suppressing the risk of mis-turn-on caused by
crosstalk between the upper and lower bridge arms, achieving dual optimization of
crosstalk suppression and switching performance. This significantly improves the reliability and stability of the gate drive, extends the lifespan of the
power semiconductor device, and is suitable for various power topologies such as half-bridge and full-bridge, with wide application scenarios and strong practicality.