The invention discloses a preparation method of a
silicon micro / nanometer
line array with a controllable dimension. The preparation method is characterized in that a
silicon chip is used as a substrate, a sample A is obtained through taking out the
silicon chip to be dried after the surface of the
silicon chip is cleaned,
photoresist is coated on the surface of the sample A in a spiral way, and a
photoresist layer is baked; a
contact type mask is prepared according to the pattern types of the silicon micro / nanometer
line array, the
mask is utilized for realizing the
exposure on the
photoresist layer to obtain a sample B, the sample B is developed in developing liquid for 4 to 6 minutes, and exposed photoresist is washed away to obtain a sample C; a
gold film with the thickness being 20 to 50 nanometers is coated on the surface of the sample C to obtain a sample D; the sample D is placed into
acetone to remove the photoresist and the gold on the sample, and the
silicon chip in contact with the gold, i.e. a sample E is obtained; and the sample E is soaked into
etching liquid to carry out gold
catalysis chemical
etching, and the silicon micro / nanometer
line array is obtained after the
etching completion. The preparation method provided by the invention can be used for obtaining the silicon micro / nanometer line array with the controllable
diameter and length and the uniform
crystal orientation so that the silicon micro / nanometer line array can realize the practical application to devices.