An adaptive digital
power control system is disclosed, which implements a digitally controlled, near real-time
algorithm to accommodate multiple loop
current mode controls for
low voltage, high
performance computing system power needs. For example, an adaptive digital
power control system that is implemented with an FPGA to generate low voltages for high
performance computing systems is disclosed, which includes a current and
voltage loop
compensation algorithm that enables the adaptive digital
power control system to dynamically compensate for
high current transients and EMI-related
noise. The current and
voltage loop
compensation algorithm uses a combination of
linear predictive coding and Kalman filtering techniques to provide dynamic current and
voltage compensation, and implement a feed-forward technique using knowledge of the power system's output parameters to adequately adapt to the system's compensation needs. More specifically, an adaptive digital
power control system is disclosed, which includes a power stage for generating a plurality of low voltages, a
multiplexer and A / D converter stage for receiving and converting the plurality of low voltages and a plurality of associated currents to a plurality of digital voltage and current signals, a current and
voltage compensation algorithm stage for receiving the plurality of digital voltage and current signals and generating a plurality of digital voltage and
current compensation control signals using
linear predictive coding, Kalman filtering and feed-forward
estimation techniques, and a digitally controlled pulse width modulator stage for receiving the plurality of digital voltage and
current compensation control signals and controlling the duty cycles of a plurality of
transistor switching devices in the power stage. Thus, the adaptive digital
power control system can dynamically compensate for
high current transients and EMI-related
noise generated in
low voltage power systems for high
performance computing systems.