As aforementioned n ternary voltage regulating circuits are arranged, as (1-n), wherein the turns ratio between the secondary and the first of the first transformer (B) is K, while the second is 31K, the third is 32K, as like, the n-th is 3n-1K, and the switch (Q1-Q4) only closes one group of (Q1, Q3), (Q1, Q2), or (Q3, Q4), (Q2, Q4). Therefore, a voltage regulator with n bits of ternary digit alternative-current stabilizer is provided. Assuming the values of m-th digit signal is Sm-1, the regulating input voltage is Vout, therefore, the output voltage Vs of the regulator is Vs=VoutK(10S0+31S1+32S2+...+3n-1Sn-1)(Sm-1=-1, 0, +1).