57results about How to "High degree of parallelization" patented technology

The invention discloses a topic detecting device and a topic detecting method based on distributed multistage cluster. The topic detecting device mainly comprises a news acquiring module, a news classifying module, a topic detecting module, a topic integrating module and a topic displaying module. The topic detecting method is characterized by comprising the steps of A, acquiring news; B, classifying the newly acquired news; C, performing multistage cluster for various channels concurrently; and D, computing hotness of all topics, and screening hot topics of a total system and hot topics in each channel. By the topic detecting device and the topic detecting method, a sharp contradiction between a detecting effect and time cost in topic detection under the condition of quick updating of a large number of files in an internet environment can be solved.

In a parallel processor system for executing a plurality of threads in parallel to each other by a plurality of thread execution units, the respective thread execution units allow for forking of a slave thread from an individual thread execution unit into another arbitrary thread execution unit. The respective thread execution units are managed in three states, a free state where fork is possible, a busy state where a thread is being executed, and a term state where a thread being terminated and yet to be settled exists. At the time of forking of a new thread, when there exists no thread execution unit at the free state, a thread that the thread execution unit at the term state has is merged into its immediately succeeding slave thread to bring the thread execution unit in question to the free state and conduct forking of a new thread.

Methods and systems for parallel rate-constrained motion estimation in a video encoder are provided. Embodiments of the present invention provide a solution for the problem of the reliance upon spatial dependencies when processing parallel RCME on a frame. In order to solve this problem, embodiments of the present invention determine a list of at least two Motion Vector Predictor Candidates (MVPC), determine, in parallel for at least two of said at least two MVPCs, corresponding Motion Vector Candidates (MVC) using Rate-Constrained Motion Estimation (RCME) and determine the optimal Motion Vector (MV) among the determined MVCs based on rate distortion optimization.

The invention relates to a device for pumping a fluid into a bioreactor. Polsatile pumping is made possible by valve arrangement so that growth of the cells in the bioreactor is increased. Pumping function can be achieved though several mechanisms. A piston can be displaced in a cylinder, especially by an electromagnet, wherein a permanent magnet or likewise an electromagnet can be arranged in the piston. The piston can also be displaced by compressed air. An elastic, hollow body can also be provided, wherein said hollow body can be deformed by mechanical electromagnetic forces so that pumping function is achieved by a change in volume. The pumping device can also be used as implant for assisting or replacing heart function.

The invention discloses a method for solving combination and optimization problems using an ant colony optimization technology based on Map Reduce and belongs to the technical field of solving the combination and optimization problems. The method for solving the combination and optimization problems using the ant colony optimization technology based on the Map Reduce comprises the following steps: dividing solution spaces of appointed combination and optimization problems according to amount of set mapper; in a Map period, every mapper independently executes an improved ant colony algorithm in parallel in a subproblem solution space acquired through division in the first step and searches a locally optimal solution; in the Reduce period, the reducer accepts all locally optimal solutions searched in different solution spaces by the mapper, and globally optimal solution is acquired according to a solution space division condition adopted in the first step; the globally optimal solution acquired currently by the reducer is output and the steps come to an end. The method for solving the combination and optimization problems using the ant colony optimization technology based on the Map Reduce is good in flexibility and capable of improving efficiency of solving a large-scale combination and optimization problems.

The invention provides a code aperture spectral imaging system reconstruction method, relates to a method capable of rapidly acquiring a high-resolution hyperspectral image, and belongs to the field of computational imaging. The method provided by the invention is applied to a code aperture snapshot spectral imaging system. Hyperspectral image reconstruction is converted into the optimization of total variation constraints. An alternating direction multiplier method (ADMM algorithm) is used for solving. A conjugate gradient descent method is used to update the hyperspectral image. A soft threshold function is used to update the auxiliary variables of the ADMM algorithm. Iteration is carried out according to the alternating updating policy of the ADMM algorithm to reconstruct the hyperspectral image. According to the invention, the high-resolution hyperspectral image used for code aperture spectral imaging is rapidly reconstructed; the method has the advantages of fast convergence, high reconstruction efficiency and easy parallel processing; and the method is suitable for a code aperture snapshot spectrometer, and can be expanded to be suitable for a spectrometer device based on multichannel sampling.

The invention is applied to the technical field of image processing, and provides a small target image processing device. The small target image processing device comprises a double-template morphology filter circuit module and a threshold segmentation module. The double-template morphology filter circuit module is used for restraining backgrounds of an original image and removing the backgrounds occupying the majority of pixels and noise to allow the majority of pixels of a background-restrained image are concentrated in a low gray-scale area. The threshold segmentation module is connected with the double-template morphology filter circuit module and is used for processing the background-restrained image into a binary image including a target. With the small target image processing device, processing speed and real-time performance of target detection are greatly increased, and effect of the target detection is improved.

The invention discloses a method and device for downloading data, belonging to the technical field of downloading. The method comprises the following steps: receiving a download request from a user, inquiring the resource of the data to be downloaded from a resource server, and judging whether the resource is a secondary resource of each part of the split data to be downloaded; if yes, staring to download each part of the split data to be downloaded, merging the downloaded parts so as to obtain the data to be downloaded; and if no, downloading the data to be downloaded from the resource. The device comprises a receiving module, an inquiring module and a downloading module. In the invention, an anti-theft chain effect is achieved by virtue of split downloading, and the downloading parallelization level is high, thereby improving the downloading speed, saving the downloading time, meeting the requirement of a user on a high downloading speed and maximally saving the bandwidth cost of the server. When the method and device provided by the invention are applied to a peer-to-peer (P2P) downloading mode, the contribution rate of the P2P can be effectively improved.

The invention provides an FFT (fast Fourier transform) parallel processing device and an FFT parallel processing method. The FFT parallel processing device supports butterfly operations of one or more radixes and comprises an FFT controller and a butterfly operational unit. The FFT controller is used for dividing FFT operation into one-level or multi-level butterfly operations according to the parallelism degree. The parallelism degree refers to the multiple of one or more radixes supported by the device. The butterfly operational unit is used for performing each level butterfly operation, one or more times of butterfly operations are performed in each level butterfly operation, and the radix of each time butterfly operation is the radix supported by the device. By the FFT parallel processing method and the FFT processing device, on the condition of uniformity of accessing-storing parallelism degree and system parallelism degree, accessing and storing conflicts are avoided through simple address operation. Moreover, high FFT parallelism degree is also supported, and hardware resources are kept in low level while operating speed is improved.

The invention discloses a defining method based on electric vehicle travelling track characteristics and a data mining technology. The defining method comprises a common track modeling method of track starting point and finishing point, a track envelope curve and driving characteristics and an efficient common track mining algorithm in massive electric vehicle travelling track data, wherein the common track modeling method comprises track starting point and finishing point modeling, track envelope curve modeling and driving characteristic modeling; and the common track mining algorithm comprises a track starting point and finishing point space-time clustering algorithm, a common track finding and track envelope curve determining algorithm and a driving characteristic extracting algorithm. The invention provides a modeling method of a parameterized common track and the track characteristics are parameterized and abstracted; and on the basis of guaranteeing the accuracy of describing a common track rule by the common track, the simplicity of track description is further improved and common modeling is carried out on diversified tracks in the aspect of a macroscopic space-time scale so that the extraction of dynamic information characteristics in a travelling process is realized and identification and classification of track data are realized.

The invention provides a light source unit using a liquid core fiber as a light guide, by which the liquid core fiber is inhibited from being overheated, and a light source unit by which an infrared cut filter having a multi-layer reflection film can prevent infrared rays from being introduced into a liquid core fiber, and its miniaturization can be made without causing evils.The first light source is equipped with a light source having a discharge lamp and a converging mirror, and a light guide formed of a liquid core fiber, wherein the light source and the light guide are held in a casing made of a metal, an infrared cut filter is provided in a cylindrical light shielding body surrounding an optical path in the interior of the casing, and the light shielding body and the light guide holding portion are thermally insulated from each other by a heat insulating material portion.The second light source unit is equipped with a light source having a discharge lamp and a concave mirror projecting parallel light or substantially parallel light, and a light guide formed of a liquid core fiber, wherein an infrared cut filter having an infrared reflecting layer formed of a multi-layer reflection film is provided on an optical path, and a condenser lens is provided at a more forward position than the infrared cut filter.

A technique is described for improving throughput in a processing system, such as a network storage server. The technique provides multiple levels (e.g., a hierarchy) of parallelism of process execution within a single mutual exclusion domain, in a manner which allows certain operations on metadata to be parallelized as well as certain operations on user data. The specific parallelization scheme used in any given embodiment is based at least partly on the underlying metadata structures used by the processing system. Consequently, a high degree of parallelization possible, which improves the throughput of the processing system.

The invention discloses an image-text data fusion method and system based on an attention mechanism. The method comprises the following steps: firstly, constructing an image-text data fusion network based on an attention mechanism, a complete training network is constructed based on a specific task, a training set is used for training, and then images to be fused and text data are input into the trained data fusion network to achieve data fusion of the images and the text data. Compared with the prior art, the method has the outstanding characteristics and advantages that firstly, position codes are introduced to replace a recurrent neural network to model text contexts, the parallelization degree of a data fusion network is higher, and the training speed of a training model is higher; 2,through fusion of the image and the text on the semantic level, the fused data is higher in quality and stronger in usability; And thirdly, the method can train a data fusion network through multipletasks, and the robustness is higher.

The invention discloses a parallel simulation processing method of a gate-level circuit and a computer readable storage medium. The parallel simulation processing method of the gate-level circuit comprises the following steps: based on an adjacent matrix of the gate-level circuit, segmenting a graph corresponding to the gate-level circuit into a plurality of clusters by adopting a first preset segmentation algorithm; taking each cluster as a superpoint, and packaging data of each superpoint by adopting a first data structure; on the basis of a superpoint diagram formed by all the superpoints, dividing all the superpoints into a plurality of partitions capable of being processed in parallel by adopting a second preset segmentation algorithm, and packaging partition data by adopting a second data structure; generating a cluster priority event queue between clusters and a node priority event queue in the clusters by adopting a preset priority distribution algorithm on the basis of the super-point data and the partition data; and simulating the gate-level circuit according to a simulation sequence defined by the priority event queue. According to the invention, the simulation efficiency of the gate-level circuit can be effectively improved, and the simulation complexity of the gate-level circuit is reduced.

The invention discloses a network flow time sequence prediction method based on distributed clustering. The method comprises the steps: carrying out the fusion of a distributed clustering algorithm and an auto-regression model; obtaining time segment groups through the segmenting of time sequence data, and carrying out the distributed clustering of the time segment groups through employing a distributed K-means clustering algorithm; carrying out the normal distribution fitting of each cluster in a clustering result, and obtaining a normal distribution N(mu, sigma2), wherein mu is a preliminary prediction value. At a prediction stage, the to-be-predicted time sequence data is preprocessed, and the to-be-predicted time segment prefix groups. The method achieves the distributed calculation of the preliminary prediction value corresponding to the nearest cluster, and achieves the correction of the preliminary prediction value through combining with an autoregressive model, thereby obtaining a more precise final prediction value.

The invention provides a high-performance parallel implementation device of a K-NN on a GPU processor. The high-performance parallel implementation device is used for improving parallel acceleration implementation of classification on the GPU processor. The device comprises: a data read-in module for storing training data and test data in an application scene in a matrix form; the sample distancecalculation module that calculates the distance between each test sample and all the training samples; the Top-K selection module that judges execution granularity by utilizing a pre-trained decisiontree model, including thread level optimization, thread bundle level optimization, thread block level optimization, multi-thread block level optimization and radix-based sorting optimization, and first k elements are selected; the label selection module that sets a category label for the test sample. According to the invention, the Top-K parallel framework based on the divide-and-conquer method isused, unnecessary operation is greatly reduced, hardware resources can be more fully utilized, and the purposes of improving the K-NN parallel efficiency on the GPU and achieving time performance acceleration are achieved.

The invention discloses a high resolution and wide swath airborne synthetic aperture radar (SAR) real-time imaging processing system based on a graphics processing unit (GPU). The system enables main servers and auxiliary servers to be arranged on an airplane, data obtained by the main servers in real time are distributed to the main servers and the auxiliary servers, and all servers utilize an optimized Omega-k algorithm to perform real-time imaging processing. The whole processing flow of the high resolution and wide swath airborne SAR real-time imaging processing system based on the GPU improves data processing efficiency and can meet high resolution and wide swath real-time imaging processing requirements at onboard environment.

The invention discloses an implementation method of a systolic array structure for LU decomposition. The systolic array structure comprises an arithmetic unit array for calculating an upper triangularmatrix, an arithmetic unit array for calculating a lower triangular matrix, and a state controller module for controlling data input. Compared with an existing operation structure, the implementationmethod has the following innovations that (1) matrix data is input in parallel according to lines, and an input sequence does not need to be planned; (2) the dividers are independently extracted fromthe array processing unit, so that the number of the dividers is reduced, and the resource utilization rate is improved; (3) the pulsation array is partially parallelized, and the number of clock cycles required by operation is reduced while maintaining high pipelining; and (4) the high-dimensional systolic array structure designed by the invention can be compatible with lower-dimensional matrixLU decomposition, so that the same structure can be shared by matrixes with different dimensions, and the redesign of the structure is avoided. The implementation method can be applied to hardware implementation of matrix decomposition problems in the fields of signal processing, numerical analysis, artificial intelligence and the like.

A process for manufacturing MEMS devices, includes forming a first assembly, which comprises: a dielectric region; a redistribution region; and a plurality of unit portions. Each unit portion of the first assembly includes: a die arranged in the dielectric region; and a plurality of first and second connection elements, which extend to opposite faces of the redistribution region and are connected together by paths that extend in the redistribution region, the first connection elements being coupled to the die. The process further includes: forming a second assembly which comprises a plurality of respective unit portions, each of which includes a semiconductor portion and third connection elements; mechanically coupling the first and second assemblies so as to connect the third connection elements to corresponding second connection elements; and then removing at least part of the semiconductor portion of each unit portion of the second assembly, thus forming corresponding membranes.

The invention provides carrier jointed board feeding and discharging equipment. The carrier jointed board feeding and discharging equipment comprises a jointed board feeding mechanism, a jointed boarddischarging mechanism, a shifting mechanism, a material distributing and collecting subassembly and an uncovering gripper mechanism, wherein the uncovering gripper mechanism is used for moving an unbuckled full-carrier jointed board from the jointed board feeding mechanism to the jointed board distributing position, moving a carrier-free jointed board from the jointed board distributing positionto a jointed board receiving position, and moving a buckled full-carrier jointed board from the jointed board receiving position to a jointed board discharging mechanism; the carrier jointed board comprises a lower cover and an upper cover which can be locked through a locking mechanism and further comprises a plurality of carriers arranged between the lower cover and the upper cover, and the uncovering gripper mechanism is provided with a cover opening mechanism suitable for opening the locking mechanism. High-automation carrier jointed board feeding and discharging can be achieved, inlet andoutlet of the carrier jointed board do not interfere with the automatic buckling procedure, the parallelization degree is high, and the production efficiency can be improved; and the equipment is more compact, so that the yield per unit area is increased.

The invention provides a three-dimensional photoacoustic imaging method for improving a limited visual angle problem. The three-dimensional photoacoustic imaging method comprises the following steps:acquiring related parameters of a system, calibrating a camera to acquire camera internal parameters and calibrating plate parameters; fixing a calibration plate on one side of the ultrasonic probe, and distributing photoacoustic signals, a counter matrix and image storage; identifying the calibration plate from the camera image, and positioning the position of the ultrasonic probe; irradiating the target by using a light source, receiving the photoacoustic signal by using a probe, recovering the initial photoacoustic signal pixel by pixel, and updating the photoacoustic signal matrix; enveloping the photoacoustic signal matrix according to a time dimension, obtaining a signal value, updating the signal value to a three-dimensional image matrix, and refreshing image display; gradually moving and rotating the ultrasonic probe to enable the probe to stay at a plurality of positions and angles, and repeating the steps of probe positioning, photoacoustic signal recovery, image matrix updating, display refreshing and the like.

The invention belongs to the technical field of network encrypted traffic classification, and particularly relates to an encrypted traffic classification method based on a twin neural network. The method comprises the following steps: firstly, extracting packet features of data packets in to-be-classified network flow data, and carrying out feature cascading to obtain packet feature vectors; inputting the packet feature vector into a trained feature processing network model, and sequentially performing deep feature mining, flattening processing and feature compression on the packet feature vector to obtain a flow vector; and finally, comparing the output vector of the to-be-classified network flow data with the output vectors of the network flow data of various known categories so as to classify the to-be-classified network flow data. The feature processing network model used in the method is simple in structure, a multi-head attention mechanism is adopted to capture the relationship between data packets and improve the parallelization degree, a simple one-dimensional CNN is used for further feature extraction and fusion, and a part of the network structure is repeatedly used to reduce the parameter quantity, so that the algorithm is more efficient. Therefore, simple and efficient unknown traffic discovery and classification are realized.

The invention discloses an end-to-end judicial document automatic proofreading method based on deep learning, and belongs to the technical field of natural language processing. The automatic proofreading method comprises the following steps: step 1, proposing a Transformer model structure; 2, training the Transformer model, and obtaining the likelihood of the maximized model on training data S; and 3, introducing a length penalty term into the likelihood obtained in the step 2 to obtain a decoding strategy. The encoder-decoder model-Transformer based on the self-attention mechanism is used, the defects of the recurrent neural network and the convolutional neural network are effectively avoided, and the performance of the encoder-decoder model based on the recurrent neural network and the convolutional neural network is far higher than that of the encoder-decoder model based on the recurrent neural network and the convolutional neural network.

The invention relates to automatic grabbing of a robot, in particular to an automatic workpiece grabbing method of the robot based on an RGB-D image and a CAD model. The method comprises the following steps: establishing a virtual environment of a virtual camera and a workpiece CAD model based on VTK; segmenting the image by using a neural network to obtain a 3D point cloud of the target workpiece; and then matching with a virtual CAD model point cloud. The method is good in matching effect and high in speed, and the problems that the robot is inaccurate in workpiece grabbing, poor in effect and the like are solved.

The aim of the invention is to provide an HEVC-based intra-frame predictive decoding method and a device, which are used for solving the problems of the intra-frame predictive decoding method in present technology, such as too many processing flow branches and low efficiency. Applied to the angular intra-frame predictive mode, the method comprises the following steps: invoking preset intra-frame predictive parameters that are corresponding to the colour component index, the intra-frame predictive mode and the size of the predictive block according to the colour component index, the intra-frame predictive mode and the size of the predictive block; and carrying out an intra-frame predictive process upon multiple pixels by the invoked intra-frame predictive parameters. Through the method, the invention can increase the parallelization degree of data, reduce code branches and improve the use ratio of the assembly line of a processor.

The invention provides camera module feeding equipment. The camera module feeding equipment comprises a charging tray feeding mechanism, a charging tray locating mechanism, a charging tray discharge mechanism, a charging tray taking mechanism and a shifting taking mechanism, wherein the charging tray feeding mechanism is suitable for carrying a first charging tray pile; the charging tray locatingmechanism is suitable for carrying and fixing single charging trays; the charging tray discharge mechanism is suitable for carrying a second charging tray pile; the charging tray taking mechanism is suitable for taking the full charging tray on the surface of the first charging tray pile and moving and placing the full material tray in the charging tray locating mechanism, or taking the empty charging tray of the charging tray locating mechanism and moving and placing the empty tray on the surface of the second charging tray pile; the shifting taking mechanism is suitable for taking camera modules from the charging trays of the charging tray locating mechanism, and moving and placing the camera modules in a module transfer position; and a moving path from the charging tray locating mechanism to the module transfer position does not interfere with a moving path between the charging tray feeding mechanism, the charging tray locating mechanism and the charging tray discharge mechanism. The camera module feeding equipment can realize highly automatic charging tray feeding and discharging. Feeding and discharging of the charging trays and automatic buckling do not interfere mutually. The camera module feeding equipment is high in parallelization degree and can improve the production efficiency.

The invention provides an FFT (fast Fourier transform) parallel processing device and an FFT parallel processing method. The FFT parallel processing device supports butterfly operations of one or more radixes and comprises an FFT controller and a butterfly operational unit. The FFT controller is used for dividing FFT operation into one-level or multi-level butterfly operations according to the parallelism degree. The parallelism degree refers to the multiple of one or more radixes supported by the device. The butterfly operational unit is used for performing each level butterfly operation, one or more times of butterfly operations are performed in each level butterfly operation, and the radix of each time butterfly operation is the radix supported by the device. By the FFT parallel processing method and the FFT processing device, on the condition of uniformity of accessing-storing parallelism degree and system parallelism degree, accessing and storing conflicts are avoided through simple address operation. Moreover, high FFT parallelism degree is also supported, and hardware resources are kept in low level while operating speed is improved.

The invention discloses a PSF inverse transformation method based on parallel LU decomposition. The PSF inverse transformation method comprises the steps of A1, inputting a two-dimensional PSF matrix H and a vectorized image planar image P and blocking the matrix H and the vector P respectively; A2, initializing s=0; A3, making s=s+1 and conducting first transformation computation on a submatrix Hs-s of the matrix H and n-s submatrixes Hi-s; A4, conducting second transformation computation on a submatrix Hi-j of the matrix H; A5, judging whether s is equal to n-1 or not, if yes, executing the step A6, and if not, repeating the step A3; A6, using a submatrix set below a main diagonal in the matrix H as an equation set coefficient matrix, using the vector P as an equation set constant item, conducting calculation to obtain a blocked vector Q and using the blocked vector Q as a middle variable; A7, using a submatrix set at a main diagonal or above in the matrix H as an equation set coefficient matrix, using the blocked vector Q as an equation set constant item, and conducting calculation to obtain an object planar image vector B. According to the PSF inverse transformation method based on the parallel LU decomposition, the time consumed in the PSF transformation process can be effectively shortened.

The invention discloses a storage method and system for semiautomatic extraction and structuralization of document information and mainly realizes semiautomatic classification extraction and structuralization on the document information. A Web interface provided by a WebUI module in the system is used for supporting a project management module, an extracted item collection module and a user management module; the project management module imports a to-be-analyzed PDF document; the extracted item collection module manually calibrates and saves information in a to-be-extracted list; the user management module manages user rights; a storage module is adopted for saving document metainformation and extracted item information; and automatic extraction and structuralization on the document information are realized, wherein a core adopts an automatic extraction algorithm module, and the automatic extraction algorithm module is used for scanning an uploaded document, then automatically detecting page prediction for generation of extracted items and performing structuralization on information obtained by the extracted item collection module. The system disclosed by the invention realizes semiautomatic extraction and structuralization on the document information, so that stored information is more reasonable, and speed and efficiency of the system are improved.