23 results about "Nonlinear capacitance" patented technology

The application belongs to the technical field of digital signal processing, and particularly discloses a digital signal generation and processing method and system for synchronous rectification, wherein the method comprises the following steps: obtaining the staggered sampling code stream of a synchronous rectification device, and outputting time-aligned voltage and current characteristic values after group delay hard compensation; performing polynomial thermodynamic school correction in combination with discrete shell temperature sampling values; performing physical safety working area boundary checking on the corrected characteristic values, addressing and interpolating output of the target optimal conduction timing value in the irregular lattice space; extracting a feature vector to perform recursive least square prediction, and outputting an overshoot prediction extreme value; performing discrete charge integration in combination with a nonlinear capacitance function, and iteratively outputting a target dead time value based on the charge conservation criterion; and the application has the advantages of accurate control timing, physical boundary safety and dead time self-adaptation.

The invention relates to a memcapacitor element (1) for operating under a non-linear capacitance-voltage curve (2). The memcapacitor element (1) comprises a plurality of electrical contacts for making electrical contact with the memcapacitor element, a first electrode (3a) and a second electrode (3b). The memcapacitor element (1) further comprises at least one dielectric layer (5a, 5b) arranged between the first electrode and the second electrode, where the electrical contacts, the electrodes (3a, 3b) and / or the at least one dielectric layer (5a, 5b) have charge trapping sites forming potential wells of different depths for trapping different numbers of charges. In addition, the invention also relates to a method for operating the memcapacitor element.

This invention relates to the field of optical imaging technology, specifically providing an optical radar co-aperture off-axis imaging system, comprising: an off-axis mirror assembly, a frequency-splitting device, a radar transceiver system, and an optical imaging system. The frequency-splitting device is disposed in the rear optical path of the secondary mirror and is used to reflect light waves and transmit microwaves. The frequency-splitting device includes a frequency-selective surface, which comprises an FSS pattern layer and a bias line layer. The FSS pattern layer includes periodically arranged FSS units. Nonlinear capacitors are electrically connected to the FSS units. The bias line layer applies a voltage to the nonlinear capacitors according to the received microwave band. By changing the voltage applied to the nonlinear capacitors, the resonant frequency of the FSS units is tuned, thereby changing the microwave passband frequency of the frequency-splitting device. This invention not only achieves a reflective wave-transmitting microwave design but also solves the problem that transmitting only a single band of microwaves in microwave-transmitting and light-reflecting methods is difficult to adapt to different task requirements.

A successive approximation register analog-to-digital converter may include a reference digital-to-analog converter, a successive approximation register, and a top-plate sampled comparator configured to compare a reference signal generated by the reference digital-to-analog converter to an analog input signal in order to generate a comparator output to the successive approximation register. The top-plate sampled comparator may include sampling transistors, sampling switches, non-linear capacitors, and circuitry configured to pre-condition the comparator by maintaining a constant voltage across non-linear capacitors of the top-plate sampled comparator during a sampling phase of the comparator in order to maintain sampling linearity of the top-plate sampled comparator.

The application discloses a terahertz frequency doubler structure and method based on a nonlinear transmission line. The terahertz frequency doubler structure comprises an input waveguide-microstrip transition structure, a low-pass filter, a nonlinear transmission line, a band-pass filter and an output microstrip-waveguide transition structure which are cascaded in sequence. The nonlinear transmission line comprises a coplanar waveguide transmission line and a plurality of nonlinear capacitor devices arranged along the transmission direction of the coplanar waveguide transmission line. The nonlinear capacitor devices are connected in parallel to corresponding loading nodes of the coplanar waveguide transmission line. The equivalent capacitance of the nonlinear capacitor devices under working bias and the spacing between adjacent loading nodes are configured to regulate the dispersion relation of the nonlinear transmission line, so that the fundamental wave and the second harmonic satisfy the phase matching condition. The application regulates the capacitance of the nonlinear capacitor devices and the spacing between adjacent loading nodes, so that the fundamental wave and the second harmonic satisfy the phase matching condition, and the output efficiency of the target second harmonic is improved.

The application discloses a kind of based on full distribution nonlinear transmission line's ultra-wideband phase shifter, belong to communication technical field.The full distribution nonlinear transmission line includes: substrate and be located on the substrate heterojunction layer, as the cathode of Schottky diode ground line and as the signal line of Schottky diode anode are set on the heterojunction layer, cathode anode is connected through two-dimensional electron gas channel formed in heterojunction layer;The full distribution nonlinear transmission line is configured to receive anode bias by the signal line, to make the equivalent nonlinear capacitance of the Schottky diode change with the change of anode bias, and regulate the effective dielectric constant of the full distribution nonlinear transmission line.The application changes the equivalent nonlinear capacitance of Schottky diode by adjusting direct current bias applied on signal line, and then regulates the effective dielectric constant of full distribution nonlinear transmission line, realizes continuous, adaptive regulation and control to input signal phase.

The invention discloses a whole-process modeling method and system for a microwave compound semiconductor device, and relates to the technical field of microwave electronic devices. The method comprises six steps of newly building a device model, importing measured data, extracting parameters of a small-signal model, extracting parameters of a nonlinear current model, extracting parameters of a nonlinear capacitance model and globally verifying the model, so that one-stop parameter extraction covering the whole process is realized, and an analysis and optimization algorithm is integrated to improve the parameter precision; through global verification of five dimensions of multi-bias S parameters, current characteristics, capacitance characteristics, power scanning characteristics and a load traction circle diagram, commercial microwave simulation software is combined, and a Verilog A model capable of being directly loaded is output. According to the method, the problems that in the prior art, the process is not coherent, and verification dimensions are insufficient are solved, the modeling efficiency and the model precision are improved, and accurate model support is provided for high-frequency and high-power electronic devices.

Methods and devices used to cancel non-linear capacitances in high power radio frequency (RF) switches manufactured in bulk complementary metal-oxide-semiconductor (CMOS) processes are disclosed. The methods and devices are also applicable to stacked switches and RF switches fabricated in silicon-on-insulator (SOI) technology.

The application discloses a pulse discharge simulation method and system of a nonlinear capacitor. The method comprises the following steps: obtaining a charge quantity-voltage relationship of a dielectric material or a capacitor; obtaining circuit parameters of a discharge circuit to be simulated, and establishing a Kirchhoff equation of the discharge circuit; and iteratively calculating: according to the charge quantity-voltage relationship, the Kirchhoff equation is solved to obtain a numerical sequence of a simulated discharge current and time, and the simulation of a pulse discharge signal of the nonlinear capacitor is realized. The application can accurately simulate the pulse discharge current of the nonlinear capacitor, and is helpful to clearly judge the influence of a related physical field on the discharge current.

The present application relates to capacitive liquid level detection technology, and in particular to a kind of nonlinear capacitance signal linearization mapping liquid level determination method and system.By multi-frequency excitation and Maxwell equation set verification identification capacitance field topological structure, analyze and subdivide nonlinear distortion area to ensure mapping monotonicity and field continuity, utilize Lipschitz condition constraint local mapping stability, introduce physical reversibility verification to carry out error tracing and model iteration, finally solidify effective parameter and realize high-precision, high robustness linear conversion of capacitance signal to liquid level value.High precision, high linearity, strong robustness and physical level consistency and explainability of liquid level measurement result are realized.

The invention discloses a ferroelectric capacitor model constructed based on a voltage-controlled capacitance method and a modeling method. The model comprises a positive port, a negative port, a main capacitor module, a selection module and a judgment module. The main capacitor module is formed by connecting a direct-current resistor and a nonlinear capacitor in parallel and is connected between the positive port and the negative port; the nonlinear capacitor comprises two voltage-controlled capacitors; the selection module comprises a voltage control voltage source and an SGN function switch, the input end of the voltage control voltage source is connected with the positive port and the negative port, and the output end is connected with the judgment module; the judgment module comprises a time delay module and a linear capacitor, the input end of the time delay module is connected with the output end of the voltage control voltage source, the output end of the time delay module is connected with the SGN function switch, and the output of the SGN function switch controls the switching of the two voltage control capacitors. The problems that an existing ferroelectric capacitance model is low in simulation precision, complex in model structure, difficult in parameter extraction, poor in compatibility in an EDA tool, low in simulation efficiency and the like are solved.

A successive approximation register analog-to-digital converter may include a reference digital-to-analog converter, a successive approximation register, and a top-plate sampled comparator configured to compare a reference signal generated by the reference digital-to-analog converter to an analog input signal in order to generate a comparator output to the successive approximation register. The top-plate sampled comparator may include sampling transistors, sampling switches, non-linear capacitors, and circuitry configured to pre-condition the comparator by maintaining a constant voltage across non-linear capacitors of the top-plate sampled comparator during a sampling phase of the comparator in order to maintain sampling linearity of the top-plate sampled comparator.

This invention discloses a full-process modeling method and system for microwave compound semiconductor devices, belonging to the field of microwave electronic device technology. The method includes six steps: device model creation, measured data import, small-signal model parameter extraction, nonlinear current model parameter extraction, nonlinear capacitance model parameter extraction, and global model verification. It achieves one-stop parameter extraction covering the entire process, integrating analytical and optimization algorithms to improve parameter accuracy. Global verification is performed across five dimensions: multi-bias S-parameters, current characteristics, capacitance characteristics, power sweep characteristics, and load pull circle diagram. Combined with commercial microwave simulation software, a directly loadable Verilog A model is output. This invention solves the problems of disjointed processes and insufficient verification dimensions in existing technologies, improving modeling efficiency and accuracy, and providing precise model support for high-frequency, high-power electronic devices.

This invention relates to a modeling and application method for a nonlinear capacitance model of a DSRD device. The modeling method includes the following steps: decomposing the nonlinear capacitance to establish a current expression for the nonlinear capacitance of the DSRD device; constructing a fitting model for the nonlinear capacitance of the DSRD device based on the current expression and the working principle of the DSRD device; updating the fitting parameters in the fitting model of the nonlinear capacitance of the DSRD device based on the CV curve of the optimal model, thereby obtaining the nonlinear capacitance model of the DSRD device. The nonlinear capacitance model of the DSRD device established by the modeling method provided by this invention can accurately fit the nonlinear capacitance of the DSRD device across the entire voltage range and can achieve accurate simulation of pulse rise time.

A microphone includes a microelectromechanical system (MEMS) device responsive to sound waves or vibrations having an output coupled to a first node; a programmable gain amplifier or source follower having an input coupled to a second node, and an output for generating an analog signal, wherein the MEMS device output and the programmable gain amplifier or source follower input comprise a first nonlinear equivalent capacitance having a first capacitance-to-voltage (CV) profile; and a nonlinear capacitance component coupled to the first node, the second node, and at least one reference voltage node, wherein the nonlinear capacitance component comprises a second nonlinear equivalent capacitance having a second CV profile.

The invention relates to the technical field of optical imaging, and particularly provides an optical radar common-aperture off-axis imaging system, which comprises an off-axis reflector group, a frequency division light splitting device, a radar transceiving system and an optical imaging system, and is characterized in that the frequency division light splitting device is arranged on a rear-end light path of a secondary mirror and is used for reflecting light waves and transmitting microwaves; the frequency division light splitting device comprises a frequency selection surface, the frequency selection surface comprises an FSS pattern layer and a bias line layer, the FSS pattern layer comprises periodically arranged FSS units, the FSS units are electrically connected with a nonlinear capacitor, the bias line layer is used for applying voltage to the nonlinear capacitor according to the wave band of received microwaves, and the nonlinear capacitor is connected with the frequency selection surface. The resonant frequency of the FSS unit is tuned by changing the voltage applied to the nonlinear capacitor, so that the microwave passband frequency of the frequency division light splitting device is changed. According to the invention, the reflection wave and microwave transmission design is realized, and the problem that only single-band microwaves are transmitted and different demand tasks are difficult to adapt in a microwave and reflection wave transmission mode is solved.

The invention relates to the field of multi-module converter control, and provides a multi-phase parallel LLC resonant converter current sharing control system based on a nonlinear capacitor, which comprises N LLC modules with parallel outputs and parallel inputs, non-linear capacitors are arranged in N-1 LLC modules, the non-linear capacitor in a single LLC module serves as a resonant capacitor of the LLC resonant converter to be connected into an LLC resonant circuit, and the Nth module is an uncompensated reference module; the LLC resonant circuit comprises a power supply, a half-bridge inverter, a nonlinear capacitor, an ideal transformer, a rectification filter circuit and a filter capacitor; one end of the nonlinear capacitor is connected with the midpoint of a bridge arm of the half-bridge inverter, and the other end of the nonlinear capacitor is connected with the primary side of the ideal transformer; the nonlinear capacitor comprises a switching tube Q, an LC filter and a shunt capacitor CP; a variable phase delay angle is applied to a driving signal of a switching tube Q relative to a driving signal of a half-bridge inverter so as to change a capacitance value of a nonlinear capacitor, and gain deviation caused by parameter deviation of a resonant element is compensated.

An optimization method for sparse matrix-vector multiplication of multiple matrices with the same structure is applied to the iterative solution process of harmonic balance methods in radio frequency circuit simulation. The method includes: obtaining a first sparse matrix and a second sparse matrix of the circuit, wherein the first and second sparse matrices have the same structure and are used to characterize the nonlinear conductance and nonlinear capacitance characteristics of the circuit, respectively; in response to performing matrix-vector multiplication, in one traversal, simultaneously accessing the non-zero elements located at the same position in both the first and second sparse matrices, and performing multiplication and accumulation operations with the corresponding input vector elements to obtain the output vectors of the corresponding first and second sparse matrices; wherein the input vector is the harmonic component vector of the circuit node voltage. This invention, based on the combined access of multiple matrices with the same sparse structure, significantly reduces loop control overhead, thereby improving the overall efficiency of matrix-vector multiplication.

The invention relates to a capacitive liquid level detection technology, in particular to a linear mapping liquid level determination method and system of a nonlinear capacitance signal. A capacitance field topological structure is verified and identified through multi-frequency excitation and a Maxwell equation set, a non-linear distortion area is analyzed and subdivided to ensure mapping monotonicity and field continuity, local mapping stability is constrained by using a Lipschitz condition, error tracing and model iteration are performed by introducing physical reversibility verification, and therefore, the local mapping stability is improved. And finally, effective parameters are solidified to realize high-precision and high-robustness linear conversion from the capacitance signal to the liquid level value. High precision, high linearity and strong robustness of a liquid level measurement result and consistency and interpretability of a physical level are realized.

The application belongs to the technical field of digital signal processing, and particularly discloses a digital signal generation and processing method and system for synchronous rectification, wherein the method comprises the following steps: obtaining the staggered sampling code stream of a synchronous rectification device, and outputting time-aligned voltage and current characteristic values after group delay hard compensation; performing polynomial thermodynamic school correction in combination with discrete shell temperature sampling values; performing physical safety working area boundary checking on the corrected characteristic values, addressing and interpolating output of the target optimal conduction timing value in the irregular lattice space; extracting a feature vector to perform recursive least square prediction, and outputting an overshoot prediction extreme value; performing discrete charge integration in combination with a nonlinear capacitance function, and iteratively outputting a target dead time value based on the charge conservation criterion; and the application has the advantages of accurate control timing, physical boundary safety and dead time self-adaptation.

The application provides an IGBT modeling method, device and computer readable storage medium, the method comprises the following steps: obtaining a voltage-current (I-V) model and a capacitance-voltage (C-V) model, both independent variables comprising a first voltage and a second voltage, the first voltage being the voltage between the gate and the emitter, and the second voltage being the voltage between the collector and the emitter, the I-V model representing the output current characteristics of the IGBT, and the C-V model representing the three nonlinear capacitance characteristics of the IGBT; due to the difference between the IGBT and the ordinary field effect transistor, the second voltage in the I-V model is modified to a certain extent. The IGBT modeling method of the application is not limited to the type of IGBT, is universal, and has strong implementability.

The invention discloses a silicon carbide super-junction MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device with a floating column region in the technical field of semiconductor power devices, which comprises an N-type substrate, an N-type epitaxial layer is formed above the N-type substrate, a floating P column region is formed in the center of the N-type epitaxial layer, a gate trench is formed above the floating P column region, an N + source region and a P-body region are respectively formed on two sides of the gate trench, and a P-body region is formed in the N + source region. A P + contact region is formed on the side face of the N + source region, the P + contact region and the N + source region are in short circuit through a source electrode, and a drain electrode is arranged below the N-type substrate. By arranging the floating P column region, the highly nonlinear capacitance characteristic of the device is improved, voltage overshoot and oscillation are suppressed, and the anti-electromagnetic interference capability of the device is improved; the FOM (figure of merit) of the device is improved by designing an alternating variable doping column region and widening a floating P column region structure, and the single event burnout resistance of the device is improved.

The application discloses a kind of GaN HEMT physical base large signal model parameter extraction methods for switch, belong to semiconductor device modeling and design field, including transistor current model parameter extraction;Transistor intrinsic gate-source and gate-drain capacitance calculation;Edge capacitance model parameter extraction.The application is accurately extracted by the mode of considering the equivalent gate voltage model parameter of source-drain interaction effect under reverse bias condition, accurately characterizes the current characteristics under the condition of drain reverse bias;Using the parameter extraction method of edge capacitance bias-dependent model, the accurate characterization of deep pinch-off region nonlinear capacitance is realized, and then the precise modeling of small signal and large signal characteristics under the off state of switch device is successfully realized.