248results about How to "Decrease pitch" patented technology

The invention has an object to provide an insulation gate type semiconductor device and a method for producing the same in which high breakdown voltage and compactness are achieved. The semiconductor device has a gate trench and a P floating region formed in the cell area and has a terminal trench and a P floating region formed in the terminal area. In addition, a terminal trench of three terminal trenches has a structure similar to that of the gate trench, and the other terminal trenches have a structure in which an insulation substance such as oxide silicon is filled. Also, the P floating region 51 is an area formed by implanting impurities from the bottom surface of the gate trench, and the P floating region is an area formed by implanting impurities from the bottom surface of the terminal trench.

A lead frame (1) has a first portion (2) adapted to have a semiconductor device (10) mounted thereon and a second portion (3) including a main member (5), a number of first contact members (6) and a number of second contact members (7). The first and second contact members (6, 7) depend from the main member (5). The second portion (3) at least partially surrounds the first portion (6). The first contact members (6) extend form the main member (5) in a direction away for the first portion (2) and the second contact members (7) extend from the main member (5) in a direction towards the first portion (2).

A system and method for forming a novel C4 solder bump for BLM (Ball Limiting Metallurgy) includes a novel damascene technique is implemented to eliminate the Cu undercut problem and improve the C4 pitch. In the process, a barrier layer metal stack is deposited above a metal pad layer. A top layer of the barrier layer metals (e.g., Cu) is patterned by CMP. Only bottom layers of the barrier metal stack are patterned by a wet etching. The wet etch time for the Cu-based metals is greatly reduced resulting in a reduced undercut. This allows the pitch of the C4 solder bumps to be reduced. An alternate method includes use of multiple vias at the solder bump terminal.

The semiconductor device testing apparatus according to the present invention has a testing LSI; a power supply unit; and an intermediate substrate provided so that there is a connection between the testing LSI, and the power supply unit and tester. The testing LSI has a testing circuit and a waveform shaping circuit; a dielectric material layer disposed so as to face a tested semiconductor device; an electrode disposed in a position that corresponds to a position of an external terminal electrode of the tested semiconductor device on a surface of the dielectric material layer facing the tested semiconductor device; and a first penetrating electrode that passes completely through the dielectric material layer, is connected to the electrode, and is used for exchanging signals with the exterior. The power supply unit has mutually independent elastic probe pins that are disposed in positions that correspond to power electrodes of the tested semiconductor device, and that are provided with a metal protrusion at the distal ends thereof; a substrate that is electrically connected to the probe pins and on which a first wiring layer is formed; and a second penetrating electrode that passes through the substrate.

A connector includes contacts each having a contact portion, an elastic portion and a fulcrum portion between the contact portion and a connection portion, and a pressure receiving portion; a housing fixing the contacts; and a slider having urging portions pivotally moved between the connection and pressure receiving portions of the contacts to urging the contact portions against the circuit board, thereby achieving reliable connection and miniaturization of the connector. In an aspect, the housing is formed on the side of a board insertion opening with a recessed portion for conducting the board. In another aspect, the contact includes upper and lower contact portions one above the other arranged alternately staggered so as to be connected to a circuit board having contact portions alternately staggered, so that no defective connection occurs, even if the circuit board is inserted erroneously upside down. In a further aspect, the connector further includes locking members having an engaging portion which engages an anchoring portion of the circuit board to prevent the circuit board from being removed. In one aspect, contacts of two kinds are inserted into the housing from opposite sides, respectively so that these contacts of the two kinds are into contact with the contact portions on respective surfaces of the circuit board. In a further aspect, moreover, a plate-shaped piece is provided in opposition to the contact portions of the contacts to prevent the housing from being deformed.

An optical interconnection assembled circuit capable of reducing the number of parts and components, as well as the number of manufacturing processes and capable of mounting those parts and components at a high density in an optical module, thereby realizing a low price. The optical interconnection assembled circuit includes a substrate including plural optical waveguides having partial tapered surfaces respectively, as well as an optical element array facing each of the tapered surfaces. In the optical interconnection assembled circuit, the tapered surfaces and the optical element array are fastened so that they face each other and the optical elements of the optical element array are staggered in disposition.

A connector mounting structure on a circuit board is presented. A connector has a plurality of terminals comprising a first terminal separated with a predetermined pitch and a second terminal separated with a pitch larger than the predetermined pitch. The first and second terminals have respectively a first tail part facing toward the circuit board and a second tail part bent on the circuit board side after extended in the lateral direction of the connector housing. The first tail part is reflow-soldered to a land part formed on the surface of the circuit board, and the bent top end of the second tail part is inserted into a mounting hole penetrating the other land part formed on the circuit board and reflow-soldered. In this mounting structure of the connector, it is simultaneously possible to narrow a pitch between terminals and to increase the peeling strength.

The manufacturing apparatus of a semiconductor device includes a jig having a plurality of holders arranged in a row, a controller for controlling the pitch of the plurality of holders arranged in a row, a support means provided with a plurality of semiconductor integrated circuits, and a support means provided with a substrate having a plurality of elements. By mounting the semiconductor integrated circuits on the respective elements by using the jig having the plurality of holders arranged in a row, semiconductor devices are manufactured.

A semiconductor device is disclosed that includes a semiconductor element, a circuit board electrically connected to the semiconductor element, a heat dissipation member fixed to the first surface of the circuit board and thermally coupled to the semiconductor element, and an interposer provided to the second surface of the circuit board facing away from the heat dissipation member. The interposer is electrically connected to the circuit board. An opening is formed in the circuit board and the interposer so that the semiconductor element is thermally coupled directly to the heat dissipation member through the opening.

In a semiconductor device of the present invention, semiconductor chips are stacked in multi-layers. Each of the semiconductor chip includes: through vias extending through a top main surface thereof to a bottom surface opposite to the top main surface; a circuit element surface formed on the top main surface; pads arranged on the circuit element surface; bumps formed on the pads; and via pads, formed on the bottom surface thereof, to which the bumps of its upper semiconductor chip are joined, and positions at which the bumps of each of the semiconductor chips are respectively arranged are different from those at which the bumps of its upper semiconductor chip are arranged.

There is provided a tape recording system and head device. A tape recording system and head device include a plurality of recording sections for recording data signals on a recording medium wherein one recording section of the plurality of recording sections and another recording section arranged so as to adjoin the one recording section are disposed such that the one recording section and the another recording section are shifted from each other in a running direction and a width direction of the recording medium, and wherein the one recording section and another recording section simultaneously record a data signal on adjacent recording tracks on the recording medium.

A connector to be detachably fitted with a flexible printed circuit board or a flexible flat cable includes a required number of contacts, a housing for holding and fixing therein the contacts, and a slider for pressing the circuit board or flat cable against the contacts. The housing is provided with anchoring portions at locations corresponding to connection portions of the contacts. Connection portions of the contacts are each formed with an oblique recess to engage the anchoring portion of the housing. When the contact is being inserted into an insertion groove of the housing, a contact portion of the contact comes into contact with an upper wall of the insertion groove, but on proceeding of the insertion, the contact portion of the contact will return into parallel with the insertion groove with the aid of guidance of the engagement of the oblique recess with the anchoring portion of the housing without any oblique positioning of contacts, thereby achieving stable electrical connection of the connector.

Apply heat to thermoplastic resin film, which is eventually to become an insulating resin layer, and press the film against a mold for forming grooves on a surface of the film. Next, press-fit an electronic component into the resin film from a back-face of the film, thereby exposing electrodes of the component from a bottom of the grooves. Then cool the film for curing. Peel the film off the mold, then fill the grooves with conductive paste, and cure the paste for forming circuit patterns. The foregoing procedure allows bringing the electrodes positively into conduction with the circuit patterns of a circuit board incorporating the electronic component, and achieving a narrower pitch between routings of the circuit patterns.

The invention relates to a construction method for dam body seepage preventing curtain grouting and provides a construction method for the dam body seepage preventing curtain grouting. The grouting is carried out by a technology of dense holes, high pressure, fine cement wet grinding and concentrated slurry, and the seepage preventing ability, the corrosion resistance and the durability of a dam body curtain are improved; the seepage is prevented in a way of front blockage and rear discharge, the downstream seepage escapement point elevation of a dam body and the uplifting pressure in a dam are reduced, and the problems of frozen thawing and frozen expansion of concrete are solved. The construction method for the dam body seepage preventing curtain grouting comprises the following steps of: a. downwards drilling a group of curtain grouting holes at the top of the dam; b. drilling radial grouting holes on the upstream surface in a basic gallery; c. downwards drilling curtain connection grouting holes extending into a dam foundation in the basic gallery; d. carrying out grouting by high pressure, fine cement wet grinding and concentrated slurry; and e. drilling a water discharge structure which is communicated with the basic gallery in the dam body. The invention is mainly used for the seepage prevention and discharge reinforcement processing of the concrete dam.

A semiconductor light-emitting device includes (A) a light-emitting portion obtained by laminating in sequence a first compound semiconductor layer, an active layer, and a second compound semiconductor layer; (B) a first electrode electrically connected to the first compound semiconductor layer; (C) a transparent conductive material layer formed on the second compound semiconductor layer; (D) an insulating layer composed of a transparent insulating material and having an opening, the insulating layer being formed on the transparent conductive material layer; and (E) a second electrode that reflects light from the light-emitting portion, the second electrode being formed on the transparent conductive material layer and on the insulating layer in a continuous manner, wherein, assuming that areas of the active layer, the transparent conductive material layer, the insulating layer, and the second electrode are respectively S1, S2, S3, and S4, S1≦S2<S3 and S2<S4 are satisfied.

A connector to be detachably fitted with a flexible printed circuit board or a flexible flat cable includes a required number of contacts, a housing for holding and fixing therein the contacts, and a slider for pressing the circuit board or flat cable against the contacts. The housing is provided with anchoring portions at locations corresponding to connection portions of the contacts. Connection portions of the contacts are each formed with an oblique recess to engage the anchoring portion of the housing. When the contact is being inserted into an insertion groove of the housing, a contact portion of the contact comes into contact with an upper wall of the insertion groove, but on proceeding of the insertion, the contact portion of the contact will return into parallel with the insertion groove with the aid of guidance of the engagement of the oblique recess with the anchoring portion of the housing without any oblique positioning of contacts, thereby achieving stable electrical connection of the connector.

A probe card including rectilinear probes; a guide base plate having an insulating property, in which a plurality of guide holes are formed through which the probes are inserted in a freely movable manner and a length of a guide hole is shorter than a length of a probe; and a plurality of sheet members having an insulating property, disposed above the guide base plate facing the plate, and laminated one on another with a spacing therebetween so as not to be in contact with one another. The tail ends of some of the probes can be brought into contact with the electrode pads on a lowest sheet member, and the tail ends of the other probes penetrate through the lowest sheet member so as to be enabled to be in contact with electrode pads on other sheet members.

An active suspension system suitable for use with a vehicle, includes a passive suspension element with a first end adapted for rigid engagement to a sprung mass of the vehicle and a second end adapted for rigid engagement to an unsprung mass of the vehicle. Also included is an active suspension element with a linear switched reluctance actuator which has a first end adapted for rigid engagement to the sprung mass of the vehicle and a second end adapted for rigid engagement to the unsprung mass of the vehicle.

To provide a liquid jet head chip in which easiness in machining is improved and a narrow pitch of channels and high resolution are realized, a manufacturing method therefor, a liquid jet head, and a liquid jet recording apparatus. The liquid jet head chip includes a first actuator plate and a second actuator plate, each of which has partitions. The first actuator plate and the second actuator plate are superimposed with each other so that partitions thereof are arranged alternately. A discharging channel which is filled with ink is formed between the partition of the first actuator plate and the partition of the second actuator plate.

A joint board is arranged between an upper package and a lower package. The arrangement of the joint board makes it possible to reduce the size of solder balls and to arrange them with narrower pitch. The joint board has slightly greater dimensions those of the upper package and the lower package. This makes it possible to prevent underfill from leaking and spreading.

Disclosed herein is an IC embedded substrate that includes a core substrate having an opening, an IC chip provided in the opening, a lower insulating layer, and upper insulating layer. The IC chip and the core substrate is sandwiched between the lower insulating layer and the upper insulating layer. The upper insulating layer is formed in such a way as to fill a gap between a side surface of the IC chip and an inner peripheral surface of the opening of the core substrate. A first distance from the upper surface of the IC chip to an upper surface of the upper insulating layer is shorter than a second distance from the upper surface of the core substrate to the upper surface of the upper insulating layer.

A conductive bump formed on an electrode of an electronic component. The conductive bump is composed of a first bump having one or more layers formed on the electrode and including resin containing at least a spherical-shaped conductive filler, and a second bump formed on an upper surface of the first bump and including photosensitive resin containing a scale-shaped conductive filler.

The invention relates to the technical field of fuel of pressurized water reactor nuclear power plants, and in particular discloses a spent fuel storage grillage. Compared with the conventional loosened grillage, the spent fuel storage grillage is a compact spent fuel storage grillage, and channels are formed on enclosing plates and baffles directly so as to form square storage cavities; neutron absorbing plates made of boron stainless steel plates are fixed in the square storage cavities, so that the grid distance of the storage grillage is reduced greatly, the number of fuel assemblies stored in a pond of unit area is increased obviously, and the economic benefit of the power plants is improved.

A multilayered structure array has narrow pitches by making thinner coatings for insulating internal electrode layers from side electrodes and the productivity of the multilayered structure array is improved. The multilayered structure includes: a first internal electrode layer; a piezoelectric layer formed on the first internal electrode layer; a second internal electrode layer formed on the piezoelectric layer; a first coating formed on an end surface of the first internal electrode layer in a first side surface region of the multilayered structure and containing one of metal oxide, metal nitride, metal fluoride and metal sulfide in at least one part thereof; and a second coating formed on an end surface of the second internal electrode layer in a second side surface region of the multilayered structure and containing one of metal oxide, metal nitride, metal fluoride and metal sulfide in at least one part thereof.