The application provides a near-memory DMA data transposition controller, a data transposition method, a medium and a product. The near-memory DMA data transposition controller is arranged on a
data transmission path between a far-end memory and a near-end memory of an AI computing
chip, and comprises a first DMA control module and a second DMA control module. The transposition operation only occurs after data is read from the near-end memory, thereby reducing independent transposition
processing links, reducing transposition
power consumption overhead and operation
delay, avoiding a decrease in
bus bandwidth utilization caused by transposition, and reducing hardware resource overhead. A dynamic splitting strategy concentrates non-aligned access in a first data block, thereby improving overall
bandwidth utilization. The transposition operation is separated from a computing unit, the transposition is completed synchronously in a data carrying process, computing resources are released, and an operation period and
power consumption overhead are reduced.