45results about How to "Reduce effective width" patented technology

With a method for manufacturing a bendable tube, which is preferably envisaged for an endoscopic instrument, first a tube is separated into several tube sections in a manner such that adjacent tube sections engage into one another with a positive fit in the axis direction of the tube. After the separation of the tube into several tube sections, one envisages peripherally arranging means for providing a positive fit transversely to the axis direction of the tube, on the regions of the tube sections, which are situated in engagement with one another.

The invention relates to an MOS (Metal Oxide Semiconductor) device for ESD (Electrostatic Discharge) protection of an integrated circuit chip, belonging to the technical field of electronics. On the premise that the size of the device is not increased and more chip area is not required to be consumed, substrate resistance between a source region and a substrate contact region is increased by adding a plurality of strip-shaped well regions which are in parallel with the transverse direction of the device in a substrate region below a position between the source region and the substrate contact region, so that the ESD resisting ability of the device is improved; besides, the size of the substrate resistance of the device can be adjusted and the problem of poor starting uniformity of the device can be solved by adjusting the quantity and the width of the strip-shaped well regions and the mutual distances among the strip-shaped well regions, so that the secondary breakdown current of the device is further improved; meanwhile, the manufacturing process of the MOS device is compatible with the standard CMOS process. In conclusion, the MOS device for the ESD protection of the integrated circuit chip provided by the invention has stronger ESD resisting ability due to the increase of the substrate resistance and the production cost of the device is not increased because the size of the device is not increased.

A MEMS variable optical attenuator (VOA) chip includes a frame having a planar surface, a micro-electric actuator with a movable optical shutter arranged with respect to the planar surface of the frame, where the VOA is actuated by thermal expansion. The micro-electric actuator comprises semiconductor conductors (“wires”) that can be moved, upon applying an electrical current, by thermal expansion. In one embodiment, the MEMS VOA chip is configured in a multiple wire arrangement that restricts the shutter movement in a plane.

A support structure for supporting and tilting an oversized cargo to reduce the effective width of the cargo. The structure comprises a frame having a base and a stanchion connected to the base. A rocker arm is pivotally coupled to the stanchion to pivot about a pivot axis. The arm includes a first and second end disposed opposite one another. The arm has a center of gravity disposed between the first end and the pivot axis and that biases the arm to pivot in a first pivotal direction. First and second brackets are positioned near the first and second ends of the arm for receiving the cargo. The cargo has a center of gravity disposed between the pivot axis and the second end that causes the arm to pivot in a second pivotal direction opposite the first pivotal direction.

A golf practice green apparatus is provided which is capable of transforming between multiple configurations. A first configuration is best suited for actual use as a target green on a golf driving range or the like. In a second configuration the effective width or other dimension of the apparatus is significantly reduced to allow for practical and legal transportation of the golf practice green apparatus over a roadway.

The invention discloses a high-threshold power semiconductor device and a manufacturing method thereof, which include sequentially from bottom to top: a drain metal electrode, a substrate, a buffer layer, and a drift region; A composite column composed of a columnar p-region and a columnar n-region, a channel layer, a passivation layer, a dielectric layer, a heavily doped semiconductor layer, a gate metal electrode and a source metal electrode; the composite column is formed by sequentially depositing P-type semiconductor layer and n-type semiconductor layer are deposited and then formed by etching; channel layer and passivation layer are formed by deposition in sequence; thus the above device is divided into cell area and terminal area, dielectric layer, heavily doped The hetero-semiconductor layer, the gate metal electrode and the source metal electrode only exist in the cell area, and the passivation layer in the terminal area extends upward and wraps around the channel layer. The structure can increase the threshold voltage of the device, improve the blocking characteristics of the device, and reduce the gate capacitance.