74results about How to "Reduce logic complexity" patented technology

The invention discloses an acceleration method for realizing sparse convolutional neural network inference for hardware. The method comprises a grouping pruning parameter determination method facing asparse hardware acceleration architecture, a grouping pruning training method for sparse hardware acceleration architecture and a deployment method for forward inference of a sparse convolutional neural network. determining the packet length and the pruning rate of packet pruning according to the number of multipliers in the hardware architecture; based on the magnitude cutting mode, cutting weights except the compression rate; The network accuracy and compression rate after pruning are improved through an incremental training mode, the weight and index parameters of a non-pruning position are saved after the pruned network is finely adjusted, the network is sent to a computing unit under a hardware architecture, and the computing unit obtains the activation value of the packet length atthe same time to complete sparse network forward inference. The pruning parameters and the pruning strategy of the algorithm level are set based on the hardware architecture, the logic complexity of the sparse accelerator is reduced, and the overall efficiency of forward inference of the sparse accelerator is improved.

The invention discloses a laser radar and a distance measurement method thereof. The laser radar comprises two or more laser devices, a laser controller, a beam combiner, a detector, a time measurement device and an analysis module, wherein the laser controller controls the two or more laser devices to emit laser pulses at different moments by all amplitudes indicated by a preset amplitude sequence according to a preset time interval sequence; the beam combiner combines laser pulses emitted by the laser devices into the same emitting channel for emission; the detector receives echo pulses; thetime measurement device measures time intervals among all the echo pulses and / or pulse amplitudes of the echo pulses; the analysis module judges that the echo pulses are obtained by reflecting the laser pulses emitted by the laser devices after the laser pulses pass through an obstacle if the time intervals measured by the time measurement device and the preset time interval sequence are matched,and / or the measured pulse amplitudes and a preset pulse amplitude sequence are matched. In the technical scheme, the accuracy of measuring distance through the laser radar can be improved.

The invention discloses an IQ signal calibration compensation method. The method comprises the steps of inputting calibration testing signals into an IQ signal calibration predistortion module; outputting compensated testing signals through compensation computing; inputting the compensated testing signals into an IQ signal calibration parameter estimation module, computing residual volume estimation of imbalance parameters, and outputting the residual volume estimation to an IQ signal calibration parameter iteration module; computing estimated values of iterated imbalance parameters by the IQsignal calibration parameter iteration module; updating the iterated imbalance parameters for compensation, thereby finishing single-time closed loop calibration; and terminating iteration if iteration times reaches the maximum iteration times, thereby finishing compensation. According to the method, closed loop iteration is carried out, complex computing such as extraction of a root and solutionof an inverse trigonometric function is avoided through utilization of an iteration approximation method, computing complexity of blind calibration is simplified, logic complexity of a digital circuitis reduced, under the same circuit area, computing count of the testing signals can be increased, compensation precision is improved, and moreover, through utilization of a closed loop system, stability under an interference condition is improved.

An embodiment of the invention provides a method for regulating CPU clock frequency and a system thereof, wherein, the method for regulating CPU clock frequency comprises the technical scheme that a double data rate controller is in a self-refreshing state in switching CPU clock frequency. The double data rate controller operates under a switched clock frequency after clock switching. Furthermore the synchronous clock relationship between the double data rate controller and the CPU is kept in the process of clock switching for obtaining a better accessing efficiency.

The embodiment of the invention discloses a multiplying and adding device, which comprises a data preprocessing unit, the data preprocessing unit is used for preprocessing input data and sending the processed data into an arithmetic unit, and the preprocessing unit comprises at least one of numerical value judgment, format conversion and format compression; and the arithmetic unit comprises a vector multiplier and a vector adder which are in cascade connection and is used for receiving the data from the data preprocessing unit and carrying out multiplication and addition operation on the dataof the data preprocessing unit by utilizing the vector multiplier and the vector adder so as to obtain a multiplication and addition result of the input data. By adopting the embodiment of the invention, the problems of complex operation, large time delay and the like in the existing multiplication and addition operation can be solved.

The invention discloses a front-end request processing method, device and equipment and a readable storage medium. In the method, a gateway is added between a front-end webpage and a background service to serve as an intermediate layer. The gateway can obtain the front-end requests, determine the target background service corresponding to each front-end request, and forward the front-end requeststo the target background services, so that the target background services process the corresponding front-end requests. Visibly, the front-end page is connected with the background service; compared with the prior art, difference processing does not need to be carried out due to different businesses, an interface, namely a gateway, is unified, so that the background service processes the front-endrequest, decoupling between the front-end page and the background service is realized, the front-end request of the front-end page can be further managed in a unified manner, and the logic complexityof the front-end page is reduced.

The invention relates to a radio frequency system, an antenna switching method and client front-end equipment, and the radio frequency system comprises a receiving module which is used for receiving and processing a radio frequency signal; M antennas, wherein each antenna of the M antennas and the receiving module are connected with the radio frequency transceiver, the M antennas are configured with M ports, and the M antennas are connected with the M ports in a one-to-one correspondence manner through the receiving module to form a preset receiving transmission path of each antenna; configuration information of a preset receiving transmission path is stored in the radio frequency transceiver, the radio frequency transceiver is further used for determining a target transceiving antenna group according to the radio frequency signal received by each port, the target transceiving antenna group comprises N antennas, wherein N is greater than or equal to 2 and less than M. According to theinvention, the insertion loss of a radio frequency front-end circuit in a radio frequency system can be reduced, the sensitivity performance is improved, and the communication performance of the radiofrequency system is further improved.

The invention provides a passive optical network system and a detection method for customer premise equipment of the passive optical network system. The detection method includes that when the customer premise equipment is abnormal and signal receiving strength is zero, a dichotomizing searching method is used for performing dichotomization on a total set for three times; a first subset and a second set, a second subset and the second set, a third subset and a first set and a fourth subset and the first set are tested through a burst clock and data recovery method, if test results are right, the subsets corresponding to the right test results are eliminated, the rest subsets and sets form the total set, the dichotomizing searching method is used for performing dichotomization and tests on the total set again, if test results are wrong, random sort is performed on all customer premise equipment in the total set through an equal probability random sort algorithm, and the dichotomizing searching method is used for performing dichotomization and tests again until all abnormal customer premise equipment is detected. According to the passive optical network system and the detection method for the customer premise equipment of the passive optical network system, time consumption is reduced, logical complexity is lowered, and the detection method is flexible.

The invention discloses a sequence waveform synthesis algorithm based on DMA (Direct Memory Access). The SG-DMA (Scatter-Gather DMA) of the Altera Corporation is adopted; the key of the sequence waveform synthesis algorithm lies in the generation of a waveform sequence address; according to the algorithm, a descriptive word chain formed by multiple descriptive words is set by utilizing a descriptive word processor inside the SG-DMA and according to the requirements of different sequences on a segment number, segment repetition frequency and a circulation mode; the configuration process of a data transmission basic parameter carried by each descriptive word is completed in sequence in an embedded development process. In the process, the generation of a final sequence address is determined according to a data source to which each descriptive word points; multiple different descriptive words are connected in sequence in a form of a chain table and further point to the same data source to complete the repetition of a single sequence, and conversely point to different data sources to complete the skid among the different sequences. Compared with a conventional sequence address generation way realized through Verilog programming inside an FPGA (Field Programmable Gate Array), the sequence waveform synthesis algorithm based on the DMA, which is provided by the invention, is simple in design, low in logical complexity and further high in flexibility.

The embodiment of the invention provides a network-on-chip, a data transmission method and a first switching node, belonging to the technical field of NoC. The network-on-chip is a two-dimensional network-on-chip or a multi-dimensional network-on-chip, each dimension of the network-on-chip comprises at least one unbuffered ring network, each unbuffered ring network comprises a plurality of routingnodes, and at least one of the plurality of routing nodes is the switching node; each unbuffered ring network is intersected with at least one unbuffered ring network, the two intersected unbufferedring networks are in different dimensions and perform data exchange through the switching node; each unbuffered ring network is configured with a dedicated slot and a public slot; at the same moment,only one switching node in each unbuffered ring network has right of use of the dedicated slot, moreover, the right of use of the dedicated slot varies orderly among the switching nodes in each unbuffered ring network, and the right of use of the dedicated slot varies after transmission of data in the dedicated slot is completed.

The present invention provides a service message cross-board processing system and a service message redirection method, wherein the system comprises a main control board and a service line card. Themain control board is provided with multiple virtual service ports, which correspond to the physical service ports of the line card and share the same port index with the physical service port of theservice line card; the service line card receives a service message from a network end and sends the service message and the port index of the physical service port to the main control board; the maincontrol board receives the message through the virtual service port corresponding to the port index; the message is subjected to forwarding and query processing, so as to obtain the port index of thevirtual service port corresponding to a message target address; therefore, the service message is sent to the corresponding service line card; after the service line card receives the service message, the service message is sent through the corresponding physical service port. According to the system and the method in the invention, the logic complexity of a main control board software module andthe coupling of the software module of the main control board and the service line card are reduced, and the robustness of the whole system is improved.

The invention, which is applicable to the field of the information technology, provides a method and apparatus for course arrangement. The method comprises: a term is divided into a plurality course arrangement segments with same time spans; to-be-arranged courses and arrangement requirements are obtained and the to-be-arranged courses are ranked based on the arrangement requirements; each of the to-be-arranged courses is traversed according to a priority level order and the corresponding course arrangement segment is obtained; and according to the course arrangement segments corresponding to the to-be-arranged courses, section information of the to-be-arranged courses in the course arrangement segments is determined by combining a course timetable requirement and lesson taking resource information. According to the invention, the course arrangement process is simplified and only the course scheduling time periods corresponding to the to-be-arranged courses only need to be considered and thus detection of courses of the whole term can be avoided. Therefore, the course arrangement efficiency can be improved substantially and the program logic complexity can be reduced.

The invention discloses interface equipment and a method for performing data exchange. The interface equipment is configured to provide a function for a radio block center RBC system for performing data exchange with a dispatching center CTC system, and comprises an RBC interface unit, a data processing unit and a CTC interface unit, wherein the RBC interface unit is used for receiving uplink datafrom one or more RBC hosts in an RBC system, performing correctness verification on the uplink data, and transmitting the uplink data to the data processing unit after determining that the uplink data passes the correctness verification; the data processing unit is used for analyzing the uplink data so as to determine a processing type, determining a processing strategy for the uplink data basedon the processing type, processing the uplink data according to the processing strategy, and transmitting the processed uplink data to the CTC interface unit; and the CTC interface unit is used for performing format conversion on the processed uplink data based on a data format of a CTC system, and transmitting the uplink data after format conversion to the CTC system.

The present invention discloses controlling caption display mode implementation method and device. It contains configuring priority parameter to caption configuration triggering entity which transmitting at least containing priority parameter and event type caption configuration event, caption configuration module receiving caption configuration event from caption configuration triggering entity, reading priority parameter and determine highest priority parameter, caption configuration module according to highest priority parameter caption configuration event inclusive event type configuring caption display mode. Said invented method and device have obvious mobility, capable of effectively avoiding overfull repetitiveness operation.

The invention discloses an LDPC decoding method suitable for an NAND flash memory. The method comprises the steps of introducing a new judgment variable En, and obtaining performance superior to thatof a bit flipping algorithm on the basis of not significantly increasing the calculation amount. For a circuit of the NAND flash memory, a new error correction algorithm has the following advantages that the logic complexity is low, and a programming circuit is simple; real number operation is only needed instead of floating point operation or multiplication and division operation, and the operation power consumption is small; the new error correction algorithm is suitable for a parallel structure, and the operation time delay is low; the flipping threshold value is adjustable, and by adjusting the threshold value, the dynamic balance of time delay and error correction performance can be achieved.

The invention discloses interface equipment and method for performing data exchange. The interface equipment is used for providing a function for performing data exchange with a wireless blocking center RBC system for a scheduling center CTC system, wherein the interface equipment comprises a CTC interface unit for receiving downlink data from the CTC system, checking the correctness of the downlink data, and sending the downlink data to a data processing unit after determining the passing of the correctness checking; the data processing unit for analyzing the downlink data so as to determinea processing type, determining a processing policy for the downlink data according to the processing type, and determining an identifier of each of one or multiple RBC hosts of a RBC system associatedwith the downlink data according to the processing policy; and a RBC interface unit for determining one or multiple target RBC hosts in the RBC system based on the identifier of each of one or multiple RBC hosts, and sending the downlink data to each target RBC host in one or multiple RBC hosts.

The invention provides a method and device for processing routing. The method comprises the following steps that a gateway receives a message which is sent by a client and carries information of a user, and acquires user group information which the information of the user belongs to when the user is in an on-line state, and the user group information comprises information, which belongs to a corresponding user group, of all users, a first route and a second route, wherein the user group is allowed to visit the first route and the second route; according to a pre-configured routing table or address base, parameters corresponding to a destination IP address in the acquired message are used as parameters for the routing; whether the parameters for the routing are parameters corresponding to the first route or the second route are judged; if the parameters for the routing are the parameters corresponding to the first route, the message is forwarded through an export of the first route; or the message is forwarded through an export of the second route if the parameters for the routing are not the parameters corresponding to the first route.

The invention discloses a method for rejecting abnormal satellites in satellite navigation positioning. Before starting of positioning iteration, rejection is performed multiple times by combining real application scenes according to resolving information; and the influence on a final positioning result by abnormal satellites and abnormal measurement values can be reduced to be in a receivable range by using an extremely low calculation amount. During the positioning iteration process, the balance of positioning precision and accuracy is sought by utilizing the satellite distribution and pseudo-range residual error information fully. The method has advantages of low calculation load, low logic complexity and stable and reliable result.

The invention relates to an automatic generation method of a power-grid dispatching instruction. The method comprises the following steps that (a) a dispatching instruction generation system is designed and realized; (b) when a dispatcher uses the dispatching instruction generation system, an electrical operation task is decomposed into operation sub-tasks, and pre-defined expressions corresponding to all operation sub-task types respectively are input to a man-machine interface of the dispatching instruction generation system successively; (c) after that each expression is input, the dispatching instruction generation system identifies identifiers, equipment names and operation parameters from the expression automatically via a global function; (d) the dispatching instruction generation system maps to a performance function which needs execution according to the identifiers in the expression, and the equipment names and operation parameters in the expression serve as parameters in the performance function; and (e) the performance function is executed, and a power-grid dispatching instruction is generated automatically. The method has the advantages that operation is simple, maintenance is easy, and the versatility is high.

The invention discloses a sound effect playing method, which comprises the steps that : when a target event type of an audio event is detected, a target sound effect identifier corresponding to the target event type is determined from a sound effect identifier set according to the target event type, and the sound effect identifier set comprises at least one sound effect identifier; a target type identifier of a sound effect receiver is obtained, and the target type identifier belongs to one type identifier in the type identifier set; a path of the target sound effect file is obtained accordingto the target sound effect identifier and the target type identifier, and the path is used for indicating an index of the sound effect file; and the sound effect corresponding to the target sound effect file is played according to the path of the target sound effect file. The invention also discloses a client. According to the device, the audio file to be played can be efficiently positioned evenunder the condition that the complexity of the online game is increased, so that the logic complexity of searching the audio file by the client is greatly reduced.

The invention discloses a data flow identifier query method and device. The method comprises the steps: receiving a data message, and extracting a first N-tuple from the data message; transforming the first N tuple by using a first hash function to obtain a first hash value, and transforming the first N tuple by using a second hash function to obtain a second hash value; searching a hash table according to the first hash value, and obtaining a corresponding bucket chain table, the bucket chain table including a specific number of hash buckets; searching a bucket chain table according to the second hash value, and obtaining address information stored in a corresponding hash bucket; obtaining a second N-tuple stored in the corresponding address space according to the address information; and when the first N tuple is consistent with the second N tuple, querying the corresponding data flow identifier in the flow table as the data flow identifier of the data message according to the second N tuple.

The application provides a method, device and system for data processing in a webpage. The method comprises the steps that based on a dataset synchronous monitoring mode preset for triggering signal running, whether a dataset needs to be synchronized is determined according to returning results of the run dataset synchronous monitoring mode; label information of the dataset to be synchronized is acquired; under preset conditions, a data synchronization request is sent aiming at the dataset corresponding to the label information, the data synchronization request is received, corresponding to-be-synchronized data is acquired based on the data synchronization request, and the to-be-synchronized data is returned to the page; and backfilling processing is conducted on the corresponding dataset by the to-be-synchronized data. The method, device and system for the data processing in the webpage provided by the application achieve self-management of the data in the webpage, and can greatly reduce maintenance cost and logic complexity of data.

The invention discloses a motion vector prediction method and device used for a VP9 decoder. The method comprises: first dividing macro-blocks to be predicted into a plurality of sub-blocks, decoding a row or a column of sub-blocks in the macro-blocks, and storing the decoding data of the row or column at a first storage position; and before decoding a next row or column of sub-blocks, determining whether the next row or column of sub-blocks are larger than a preset sub-block, storing the decoding data of the next row or column of sub-blocks at the first storage position if the next row or column of sub-blocks are larger than a preset sub-block, and storing the decoding data of the next row or column of sub-blocks at a second storage position if the next row or column of sub-blocks are not larger than a preset sub-block. The motion vector prediction method and device solve the problems of large register consumption, waste of resources, complicated mapping relation, complex hardware design logic, large hardware area, high power consumption, etc.

The invention relates to a vehicle control unit integrated with a TCU gear shifting motor control circuit, which is characterized in that a sensor power supply circuit unit supplies power to a sensor unit, and the sensor unit acquires the current gear position of a gear shifting motor and the rotating speed of a gearbox gear in real time and outputs a corresponding voltage sensing signal; the microprocessor unit acquires a voltage sensing signal through the sensor signal acquisition circuit unit; when the microprocessor unit judges that gear shifting is needed, the microprocessor unit controls connection and disconnection of an MOS tube in the motor drive circuit unit through the MOS tube pre-drive circuit unit according to the voltage sensing signal, the motor drive circuit unit drives the gear shifting motor, gear selection and gear advancing and retreating are conducted, and the gear shifting function of the gearbox is achieved. The vehicle control unit is integrated with the TCU function, and the integrated vehicle control unit is used for controlling the whole vehicle and the gear shifting mechanism, so that the hardware and structure cost is reduced, the whole vehicle control logic is simplified, the logic complexity of the whole vehicle control software is reduced, and the processing speed is increased.

The invention provides a two-stage real-time charging method. The two-stage real-time charging method comprises the following steps: using a charging system to receive a charging request sent by a business server; using the charging system to receive transaction value sent by the business server; and using the charging system to modify account value of an agent by deducting pre-borrowed value and using the charging system to modify the account value of a user by adding the pre-borrowed value when the account value of the user is less than the transaction value; and using the charging system to send a transaction command to a service providing device when the account value of the user is not less than the transaction value. The two-stage real-time charging system disclosed by the invention comprises a first storage module, a second storage module, a third storage module and a charging module which is used for receiving the charging request sent by the business server and receiving the transaction value sent by the business server, judging whether the account value of the user is less than the transaction value or not, modifying the account value of the agent and the account value of the user and sending the transaction command to the service providing device. The two-stage real-time charging method and system disclosed by the invention has the advantages of smaller logical complexity, lower data synchronization frequency and capability of ensuring maximum utilization of funds of the agent.

The invention provides a network on chip and a hedge suspension relieving method, and belongs to the field of communication technologies. In the network on chip, a first node on a first ring network is in butt-joint with a second node on a second ring network through a bridge; the first node comprises a first detecting module and a first relieving module; when the first detecting module detects that the first node is in a first state, a first hedge suspension signal is set to be the first level, and the first relieving module is triggered to jump to a blockage starting mode; the first relieving module sets a first outlet blocking signal and a first inlet blocking signal to be the first level, and broadcasts the first inlet blocking signal with the first level to other nodes on the first ring network; and the first relieving module jumps to a suspension relieving mode when the broadcast time length reaches the preset time length, and sets the first outlet blocking signal to be the second level. The network on chip can timely detect a hedge suspension state and perform a hedge suspension relieving operation. In addition, the network on chip is very low in logic complexity, very smallin consumption resource and easy to implement.

The invention discloses a recent message sending priority processing method and system based on a crawler text. The recent message sending priority processing method comprises the steps: a producer process stores all crawled data files in time folders with the message sending time of the producer process as a file name, and generates a mark file correlated with the data files in each time folder;and the consumer process extracts a time folder with the latest current time, regularizes the corresponding data file according to the mark file under the time folder, and moves the regularized data file to a historical folder. The recent message sending priority processing adopts a double-file control method, so that a producer and a consumer can be prevented from operating one file at the same time without using a system lock, and the accuracy of data is ensured, and the logic complexity of the system is reduced, and the maintainability of the system is improved.

The invention relates to a cross-business information processing system. The system includes a first matching module which acquires first business information from a first business system and matches the only identity identification of a user; a second matching module which matches second user identification information and checks a second business system so as to determine whether the user is a legitimate user of the second business system; a business switching module which acquires first business data which corresponds to first business information from the first business system; an information check module which checks second business data from the second business system based on the second user identification information; and a business succession module which integrates the first business data and the second business data for follow up processing of the second business system. The system can cross multiple business fields and provide business / service extending for users. The system has low logic complexity, high reliability, and can better protect data safety and user privacy.