This invention discloses a data prefetching method, product, device, and medium based on multiple memory access patterns, relating to the field of
computer architecture technology. The method includes: monitoring for L2 cache memory access miss events in the processor; if the miss
status register hits the event, splitting the miss address to obtain the
base address of the spatial region and the offset address within the region. When the
program counter pattern training table hits the
base address, stride and
spatiotemporal pattern training is performed on the offset address to obtain a fixed stride, space / time related access pattern. Valid memory access patterns are filtered by confidence level and stored in the corresponding LLC pattern table, with an index recorded in the prefetch pattern
record table. Subsequently, based on the memory access miss event and index information, the target pattern is read from the corresponding pattern table to calculate the prefetch address, generate a request, and execute the prefetch. Through this scheme, it is possible to adapt to multiple scenarios and accurately identify memory access patterns for more precise data prefetching.