The invention belongs to the technical field of power
semiconductor devices, and relates to a separation gate SiCMOSFET of an integrated
heterojunction diode and a manufacturing method of the separation gate SiCMOSFET. According to the invention, the
heterojunction diode is integrated in the three-dimensional y direction of the SiC
MOSFET, so that the
cell width of the SiC
MOSFET is not increased, the problems of overlarge forward turn-on
voltage drop, overlong
reverse recovery time and the like of a parasitic
diode can be effectively solved, and compared with an internally integrated SBD, the integrated
heterojunction diode has smaller
forward voltage drop. According to the mode of integrating the
heterojunction diode, the area of an active region does not need to be additionally increased, the integration level is higher, and the width of the
JFET region is not increased. Meanwhile, the spaced P-type doped regions are introduced in the y direction of the
JFET region, so that the
electric field distribution of the
JFET region of the device and the peak
electric field in the
oxide layer during blocking work can be improved, a CSL layer with higher concentration can be adopted during design, and the forward conduction characteristic of the device is improved and the resistance of the device during forward conduction is reduced while the reverse blocking characteristic of the device is not reduced.