100 results about "Metal semiconductor field effect transistors" patented technology

The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a MESFET having a source region, a drain region and a gate contact. The gate contact is disposed between the source region and the drain region. The drain region is electrically coupled to the substrate through a contact via hole to the substrate. Related methods of fabricating MESFETs are also provided herein.

A thin film semiconductor in the form of a metal semiconductor field effect transistor, includes a substrate 10 of paper sheet material and a number of thin film active inorganic layers that are deposited in layers on the substrate. The active layers are printed using an offset lithography printing process. A first active layer comprises source 12.1 and drain 12.2 conductors of colloidal silver ink, that are printed directly onto the paper substrate. A second active layer is an intrinsic semiconductor layer 14 of colloidal nanocrystalline silicon ink which is printed onto the first layer. A third active layer comprises a metallic conductor 16 of colloidal silver which is printed onto the second layer to form a gate electrode. This invention extends to other thin film semiconductors such as photovoltaic cells and to a method of manufacturing semiconductors.

The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a MESFET having a source region, a drain region and a gate contact. The gate contact is disposed between the source region and the drain region. The drain region is electrically coupled to the substrate through a contact via hole to the substrate. Related methods of fabricating MESFETs are also provided herein.

The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a source, a drain and a gate. The gate is disposed between the source and the drain and on an n-type conductivity channel layer. A p-type conductivity region is provided beneath the source and has an end that extends towards the drain. The p-type conductivity region is spaced apart from the n-type conductivity channel region and is electrically coupled to the source.

Novel GaN / AlGaN metal-semiconductor field-effect transistor (MESFET) structures grown without any impurity doping in the channel. A high-mobility polarization-induced bulk channel charge is created by grading the channel region linearly from GaN to Al0.3Ga0.7N over a distance, e.g., 1000 Å. A polarization-doped field effect transistor (PolFET) was fabricated and tested under DC and RF conditions. A current density of 850 mA / mm and transconductance of 93 mS / mm was observed under DC conditions. Small-signal characterization of 0.7 μm gate length devices had a cutoff frequency, ƒτ=19 GHz, and a maximum oscillation of ƒmax=46 GHz. The PolFETs perform better than comparable MESFETs with impurity-doped channels, and are suitable for high microwave power applications. An important advantage of these devices over AlGaN / GaN HEMTs is that the transconductance vs. gate voltage profile can be tailored by compositional grading for better large-signal linearity.

This invention relates to an optical detection field effect transistor containing quantum points and its manufacturing method characterizing: 1, longitudinally integrating a compound semiconductor optical detector and a metal-semiconductor field effect transistor to grow on a same substrate material, 2, separating the active region mesa of InAs quantum points under the grating and the source / drain region to connect the modulated conduction channel under the quantum points with the source / drain to constitute a conducting loop to realize the effective integration of optical devices and electric appliances.

The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a delta doped silicon carbide MESFET having a source, a drain and a gate. The gate is situated between the source and the drain and extends into a doped channel layer of a first conductivity type. Regions of silicon carbide adjacent to the source and the drain extend between the source and the gate and the drain and the gate, respectively. The regions of silicon carbide have carrier concentrations that are greater than a carrier concentration of the doped channel layer and are spaced apart from the gate.

The present invention provides a horizontally depleted Metal Semiconductor Field Effect Transistor (MESPET). A drain region, a source region, and a channel region are formed in the device layer such that the drain region and the source region are spaced apart from one another and the channel region extends between the drain region and the source region. First and second gate contacts are formed in the device layer on either side of the channel region, and as such, the first and second gate contacts will also reside between opposing portions of the source and drain regions. With this configuration, voltages applied to the first and second gate contacts effectively control vertical depletion regions, which form on either side of the channel region.

The invention discloses a beta ray irradiation detector based on a silicon carbide metal-semiconductor field effect transistor structure, which is used for mainly solving the problems of poor irradiation resistance and low energy conversion efficiency of an existing beta irradiation detector. The detector comprises an n-type substrate (8), a p-type buffer layer (7), an n-type channel (6) with the concentration of 3.5*10<17>cm<-3> to 4*10<17>cm<-3>, an n-type buffer layer (5) and an ohmic contact layer (4) from top to bottom, wherein a source and a drain (2) are deposited on the ohmic contact layer; a semitransparent Schottky contact layer (1) is deposited on the n-type buffer layer; the Schottky contact layer is formed by high barrier Schottky metals of Au, Ti and Pt, and is embedded in the n-type buffer layer (5) with the depth of 0.06-0.08 mu m; and a surface area except a grid electrode as well as the source and drain is covered with a SiO2 passivation layer (3). The beta ray irradiation detector has the characteristics of strong resistance to radiation, high energy conversion efficiency and high detection efficiency, and can be applied to detecting beta rays in nuclear energy.

Novel GaN / AlGaN metal-semiconductor field-effect transistor (MESFET) structures grown without any impurity doping in the channel. A high-mobility polarization-induced bulk channel charge is created by grading the channel region linearly from GaN to Al0.3Ga0.7N over a distance, e.g., 1000 Å. A polarization-doped field effect transistor (PolFET) was fabricated and tested under DC and RF conditions. A current density of 850 mA / mm and transconductance of 93 mS / mm was observed under DC conditions. Small-signal characterization of 0.7 μm gate length devices had a cutoff frequency, fτ=19 GHz, and a maximum oscillation of fmax=46 GHz. The PolFETs perform better than comparable MESFETs with impurity-doped channels, and are suitable for high microwave power applications. An important advantage of these devices over AlGaN / GaN HEMTs is that the transconductance vs. gate voltage profile can be tailored by compositional grading for better large-signal linearity.

The invention discloses a 4H-SiC metal semiconductor field effect transistor with a step buffer layer structure. The 4H-SiC metal semiconductor field effect transistor comprises a 4H-SiC semi-insulating substrate, a P-type buffer layer and an N-type channel layer from the bottom to the top. The two sides of the N-type channel layer are respectively provided with a source electrode cap layer and a drain electrode cap layer. The surface of the source electrode cap layer and the drain electrode cap layer is respectively provided with a source electrode and a drain electrode. A gate electrode is formed on one side which is arranged above the N-type channel layer and close to the source electrode cap layer. A concave gate source drift region is formed between the gate electrode and the source electrode cap layer. A concave gate drain drift region is formed between the gate electrode and the drain electrode cap layer. The position, which is arranged on the upper end surface of the P-type buffer layer and close to the source electrode cap layer, is provided with a groove. One side, which is arranged in the groove and close to the drain electrode cap layer, is provided with two steps. The 4H-SiC metal semiconductor field effect transistor with the step buffer layer structure has advantages of being stable in breakdown voltage and high in output drain electrode current.

The invention relates to a metal-semiconductor field effect transistor with an under-grid buffer layer structure and a manufacturing method; the transistor comprises a semi-insulating substrate, a buffer layer, a channel layer, an under-grid buffer layer, a source electrode cap layer, a drain electrode cap layer, a source electrode, a drain electrode and a grid electrode, wherein the under-grid buffer layer, the source electrode cap layer and the drain electrode cap layer are sequentially formed on the channel layer; the under-grid buffer layer forms a raised platform on the channel layer; and the grid electrode is formed on the raised platform. The manufacturing method of the transistor comprises the following steps of: sequentially growing a P type buffer layer, an N type channel layer and an N type under-grid buffer layer on the semi-insulating substrate; carrying out high concentration N type ion implantation on regions of both ends of the under-grid buffer layer corresponding to the source electrode and the drain electrode to form a source electrode cap layer and a drain electrode cap layer; etching a part of the under-grid buffer layer which is positioned between a grid source and a grid drain; and manufacturing the source electrode and the drain electrode on the source electrode cap layer and the drain electrode cap layer, and manufacturing the grid electrode on the under-grid buffer layer. The transistor of the invention can increase the power density and frequency response of a microwave power amplifier circuit and a microwave power amplifier system; and the manufacturing process is simple.

A dual field plate MESFET (90) and method of forming a MESFET. The MESFET (90) includes a gate electrode (100) and a drain electrode (96), with the gate electrode (100) and drain electrode (96) formed on a substrate (105). The MESFET further includes a gate side field plate (110) at the gate electrode (100) and a drain side field plate (112) in proximity to the drain electrode (96) and extending over a burnout improvement region in the substrate (105).