5 results about "Metal semiconductor field effect transistors" patented technology

The invention discloses a comprehensive two-dimensional vertical structure metal-semiconductor field effect transistor and a preparation method thereof. A source electrode, a lower isolation layer, a drain electrode and an upper isolation layer which are vertically stacked are formed on the surface of a substrate, an inclined side wall is formed, a channel covers the inclined side wall, a grid electrode and the channel are self-aligned, and a semi-metal grid electrode and a semiconductor channel are in direct contact to form a Schottky junction; based on a comprehensive two-dimensional material system, the Fermi pinning effect and unintentional doping are effectively inhibited, and the performance of the device is optimized by optimizing the grid control capability and the electric contact performance; a gate dielectric layer is not arranged, so that the problems of electrical performance deterioration and the like under a limit miniature scale are avoided; the integration density of the device is improved and the research and development and manufacturing cost is controlled while excellent performance is kept; the channel length and the contact length are synchronously and accurately reduced by utilizing a side wall vertical structure; the method is applied to the industrial application fields of next-generation integrated circuit chips, high-density memories, flexible and wearable electronics and the like which break through the silicon-based physical limit.

A multilayer semiconductor device includes: a substrate comprising silicon carbide (SiC); and an epitaxial transition layer on the substrate, the epitaxial transition layer comprising a first epitaxial oxide material or SiC. One or more epitaxial active regions comprising one or more second epitaxial oxide materials are formed on the epitaxial transition layer, and a metal layer is formed over the one or more epitaxial active regions, the metal layer comprising one or more electrical contacts. The multilayer semiconductor device includes one of the following: a metal-oxide-semiconductor field-effect transistor (MOSFET), a vertically conductive MOSFET, a lateral MOSFET, a metal-semiconductor field-effect transistor (MSFET), a bipolar junction transistor (BJT), a junction field-effect transistor (JFET), a metal-insulator-semiconductor (MIS) device, a PN device, a PNP device, an NPN device, or an insulated-gate bipolar transistor (IGBT).

A biosensor with a detection transistor of a metal-semiconductor field-effect (MESFET) type, for detecting a target substance. The detection transistor has an isolating substrate, a source electrode, a drain electrode, a first gate electrode, a channel for transmitting a drain-source current between the source electrode and the drain electrode, the channel being made of an oxide semiconductor, arranged on the isolating substrate and having the source electrode and the drain electrode arranged thereon, a sensitive substrate connected to the first gate electrode and including functionalization species for bonding the target substance, such that the first gate electrode connected with said substrate is sensitive to the target substance, and a second gate electrode arranged on the isolating substrate, physically separated from the first gate electrode by the channel, positioned opposite to the first gate electrode and aimed to modulate the drain-source current of the channel.

This invention provides a method and system for detecting displacement defects in metal-semiconductor field-effect transistors (MESFETs), relating to the field of semiconductor testing. By inputting defect parameters into a displacement defect model, it is equivalent to assuming the defect is a displacement defect, obtaining a simulated curve. This simulated curve represents the MESFET device under displacement defect conditions. The simulated curve is compared with the performance curve obtained through actual testing. When the simulated curve matches the performance curve, it can be verified that a displacement defect has occurred in the tested MESFET device. Using this method to test MESFET devices eliminates the need for multiple annealing tests for verification. Only electrical performance testing of the device under test is performed to obtain a performance curve, which is then compared with the simulated curve obtained through simulation for corroboration. This allows for accurate detection of displacement defects and improves the detection speed.

[Problem] To provide a bio-transistor that uses a bio-material made of a natural material that is friendly to the global environment and less harmful to living organisms. [Solution] A bio-transistor comprising a bio-material 11 formed from a cellulose composed mainly of wood or plant fibers (pulp). The bio-material 11 is preferably a semiconductor. Moreover, the bio-transistor is preferably a field-effect transistor (FET), and in that case, is preferably a metal-semiconductor field-effect transistor (MESFET), a metal-oxide-semiconductor field-effect transistor (MOSFET), or a junction field-effect transistor (JFET).