56results about "Amplifiers with diodes" patented technology

A sense amplifier circuit comprises (1) an isolation device comprising a control terminal and first and second terminals, the first terminal of the isolation device coupled to a signal line, (2) a gated diode comprising first and second terminals, the first terminal of the gated diode coupled to the second terminal of the isolation device, and the second terminal of the gated diode coupled to a set line; and (3) control circuitry coupled to the control terminal of the isolation device and adapted to control voltage on the control terminal of the isolation device in order to enable and disable the isolation device. A latch circuit further comprises a precharge device comprising a control terminal and first and second terminals, the first terminal of the precharge device coupled to a power supply voltage, and the second terminal of the precharge device coupled to the first terminal of the isolation device.

An amplifying transistor for amplifying a radio frequency signal between an input terminal and an output terminal. The cathode of a first diode is connected to the input terminal and the anode of a second diode is connected to the output terminal. A matching and attenuating circuit is connected between the anode of the first diode and the cathode of the second diode. A matching and attenuating circuit reduces impedance mismatches on the input terminal side and the output terminal side, and attenuates the radio frequency signal. In an amplification mode, a bias circuit supplies a bias current to an amplifying transistor and a current mirror circuit turns off the first and second diodes. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor and the current mirror circuit turns on the first and second diodes.

An amplifying transistor for amplifying a radio frequency signal between an input terminal and an output terminal. The cathode of a first diode is connected to the input terminal and the anode of a second diode is connected to the output terminal. A matching and attenuating circuit is connected between the anode of the first diode and the cathode of the second diode. A matching and attenuating circuit reduces impedance mismatches on the input terminal side and the output terminal side, and attenuates the radio frequency signal. In an amplification mode, a bias circuit supplies a bias current to an amplifying transistor and a current mirror circuit turns off the first and second diodes. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor and the current mirror circuit turns on the first and second diodes.

A power protecting apparatus and method of a power amplifier for removing backward voltages and preventing a hard damage within a circuit by connecting an output terminal of a DC-DC converter with an input terminal of a filter using diodes when an excessive backward voltage is generated due to physical characteristics of an inductor within the circuit at the time of applying high power level and low power level to the power amplifier using switching devices within a power circuit in order to optimize power consumption.

The invention includes a power amplifier with an amplifier core including parallel amplifier cells, a replica cell made of one amplifier cell similar to those of the amplifier core, a power controller to select a combination of amplifier cells to activate, a regulator to fix the top voltage of the replica cell to a reference voltage, a voltage generator to provide the voltage reference to the regulator, a current generator to provide a reference current through the replica cell, and a drive unit controlled by the regulator output to drive the combination of amplifier cells, so that each selected combination of activated cells defines a predetermined attenuation level of power amplifier output signal so that it is attenuated in a stepwise manner.

The invention provides a transimpedance amplifier chip and a light receiving module. The transimpedance amplifier chip comprises a photoelectric detector, a filter capacitor and a transimpedance amplifier chip which are packaged in the same packaging body, wherein the trans-impedance amplifier chip comprises a built-in filter resistor region and a trans-impedance amplifier device region which areisolated through a deep trench, a filter resistor is formed in the built-in filter resistor region, two ends of the filter resistor are led out to corresponding bonding pads through metal layer leads,and the built-in filter resistor and each metal layer in the built-in filter resistor region are not connected with a substrate; and devices forming a transimpedance amplifier are formed in the transimpedance amplifier device region. According to the invention, the filter circuit formed by the filter capacitor and the filter resistor is added to reduce the influence of an external Wi-Fi signal onan optical receiver and improve the sensitivity of the optical receiver; the filter resistor is arranged in the trans-impedance amplifier chip, so that the use cost of the off-chip resistor is saved,the space limitation of packaging and routing is eliminated, the packaging and routing scheme is simplified, and the practical value is high.

In conventional high data rate receivers, the transmitted optical signal has poor extinction ratio and translates into a small modulated current with a large DC current, which saturates the receiver TIA and amplifiers, and significantly degrades the gain and bandwidth performance. Consequently, cancelling PD DC current in high data rate receivers is desired for proper operation. Differential TIA schemes, i.e. providing separate AC-coupled and DC-coupled paths, in parallel, provide better linearity for large input currents and low gain settings. To AC couple the PD to the TIA using passive AC-coupling circuitry, an AC-coupling capacitor (CC) is positioned between the PD and the TIA to block the DC current, while passing the modulated AC current to the TIA. A DC cancellation circuit may be provided, without a capacitor, to maintain the receiver input bias while suppressing any DC component generated by the PD for the DC-coupled path.

A light source is gated ON and OFF in response to a pulsed signal. Photo emissions from the light source are coupled to a material under test. Resonant fluorescent emissions from the material are coupled to a photodiode. Current from the photodiode is coupled into an amplifier system comprising a first and second amplifier stages. The first amplifier stage is gated to a low gain when the light source is turned ON and the gain is increased when the light source goes from ON to OFF. The second amplifier stage has digitally programmable offset and gain settings in response to control signals. The output of the second amplifier stage is digitized by an analog to digital converter. A controller generates the pulse control signal and the control signals.

The invention provides a pre-amplifier circuit for a photoelectric detector, comprising a high voltage generation circuit and a pre-amplifier, wherein a negative high voltage generation circuit supplies high voltage to the pre-amplifier, thereby driving an avalanche photodiode to work. An MOS transistor drive chip generates a switching signal based on an access 10KHZ square wave, thereby controlling on-off of a switch MOS transistor chip; a first inductor is charged by a power supply voltage at the moment when the switch MOS transistor chip is switched on; the power is stored in a third capacitor, a forth capacitor and a fifth capacitor through a first diode circuit; after the switch MOS transistor chip is switched off, a first diode is reversely cut off, so an output capacitor discharges power to a load; and a third resistor, a fourth resistor, the third capacitor and the fourth capacitor form a second-order RC filter circuit. The pre-amplifier is small in size and stable in performance.

A light receiving front-end circuit with feedback has three N-type MOSFETs (MN0, MN1, MN2) connected in series as a load of a photodiode D1. And a P-type MOS transistor MP0 and an N-type MOS transistor MN3 together form a reverse amplifier, the input of which is the cathode of the photodiode D1, and the output of which is connected to the gate terminal of the photodiode MN0, constituting a negative feedback circuit. The invention adopts a scheme of integrating a photosensitive device and a signal conversion and amplification on an active pixel sensor (APS), and realizes the triple functions ofreceiving an optical signal, converting the optical signal into an electric signal and amplifying the optical signal through a relatively simple circuit. The light sensing circuit of the invention isrealized by a photodiode, and the amplifier is realized by a high gain circuit with feedback. These circuits have the advantages of small area, low power dissipation and easy implementation in standard CMOS process.

The invention provides a transimpedance amplifier chip and a light receiving module, comprising: a photodetector packaged in the same package body, a filter capacitor and a transimpedance amplifier chip; the transimpedance amplifier chip includes a built-in filter resistance area isolated by a deep groove And the transimpedance amplifier device area, filter resistors are formed in the built-in filter resistor area, the two ends of the filter resistors are led to the corresponding pads through the metal layer wires, the built-in filter resistors and the metal layers in the built-in filter resistor area are not connected to the substrate ; Devices constituting the transimpedance amplifier are formed in the region of the transimpedance amplifier device. The invention increases the filter circuit formed by the filter capacitor and the filter resistor to reduce the influence of the external Wi-Fi signal on the optical receiver, and improves the sensitivity of the optical receiver; overcomes technical difficulties and sets the filter resistor in the transimpedance amplifier chip, saving chips The use cost of external resistors eliminates the limitation of packaging and wiring space, and at the same time simplifies the packaging and wiring scheme, which is of great practical value.

The present invention reveals a new biasing method which can be used in solid state audio power amplifier design despite of the Class of operation. The proposed biasing technology relies only on traditional electrical feedback to build up and maintain the desired biasing current and doesn't need thermal coupling or thermal tracking techniques in order to overcome power transistor device's temperature dependent input-output characteristics as required by traditional approach. An ingenious current sensing and amplification circuit is devised in order to generate an voltage output which is only corresponding to the quiescent biasing current of the output stage. This voltage output is then used as an representative of the power stage biasing current to be regulated by a feedback loop comprising a traditional voltage multiplier, the output stage and the aforementioned current sensing and amplification circuit.

A microcontroller integrated circuit includes an open-loop transimpedance amplifier (OLTA). An input lead of the OLTA is a terminal of the microcontroller. The cathode of a photodiode is connected to VDD and the anode is connected to the terminal. The OLTA maintains the photodiode in a strongly reverse-biased condition, thereby keeping diode capacitance low and facilitating rapid circuit response. The input of the OLTA involves a diode-connected field effect transistor that provides a low impedance. This low impedance decreases as the diode current increases, thus providing effective clamping of the voltage on the terminal. By this clamping, the amount of photodiode capacitance discharging necessary when transitioning from a high input current condition to a low input current condition is reduced, thereby further improving amplifier response time. The OLTA is small and consumes less than thirty microamperes and functions to mirror photodiode current and compare to a predetermined level.

An oscillating circuit has an injection-locked oscillator (ILO) and a calibration circuit. The ILO has a Gm cell and an LC tank. A first node of the Gm cell receives a first injection signal, and a second node of the Gm cell receives a second injection signal. The first injection signal and the second injection signal are differential signals. The Gm cell provides a negative resistance between a first output end and a second output end of the Gm cell. When the calibration circuit tunes a resonant frequency of the LC tank of the ILO, the magnitude of the negative resistance is reduced to control the ILO to stop self-oscillating. After finishing tuning the resonant frequency of the LC tank, the calibration circuit controls the ILO to start self-oscillating by increasing the magnitude of the negative resistance.

The invention provides a power amplifier circuit which suppresses the breakdown of an amplifier due to an excessive voltage. The power amplifier circuit (10) is provided with an amplifier (201) that amplifies an input signal (RFin) and outputs an amplified signal (RF1); an amplifier (202) that is provided at the post-stage of the amplifier (201), amplifies the amplified signal (RF1), and outputs an amplified signal (RF2); and a clamping circuit (300) that is provided between the signal line (203) between the amplifier (201) and the amplifier (202) and the ground, and suppresses the amplitude of the amplified signal (RF1).

A divider-less phase locked loop (PLL) includes a phase frequency detector (PFD), a charge pump (CP), a voltage controlled oscillator (VCO), a delay unit, and a clock gating unit. The PFD is electrically connected to the VCO through the CP, and the CP outputs a voltage control signal to the VCO. The VCO generates an output signal. The delay unit receives and delays a reference signal to generate a delay signal. The clock gating unit samples the output signal according to the delay signal. Since the clock gating unit samples the output signal according to the delay signal, the divider-less PLL does not need to include a divider to divide a frequency of the output signal. Therefore, power consumption of the divider-less PLL can be reduced.