67 results about "Capacitance to digital converter" patented technology

The invention relates to a capacitance ratio type icing thickness sensor and a detection method thereof. The sensor is characterized in that: a relative capacitance value detection loop is formed by a single chip microcomputer inside a sensor, a double-channel capacitance digital converter, detected media icing or air spreading between pole plates, a group of parallel pole plate detection capacitors which have an geometric structure the same with a reference parallel plate pole plate detection capacitor and are arranged according to fixed ruler scale spacing positions, as well as a double-channel programmable control scale gating circuit; under the control of the single chip microcomputer, the capacitance value obtained by each relative capacitance value detection loop is compared with the reference capacitance value obtained by a reference capacitance value detection loop which is formed by the single chip microcomputer inside the sensor, the double-channel capacitance digital converter and the reference parallel plate pole plate detection capacitor, and the measurement on the surface icing thickness of the sensor is realized by analyzing and judging a ratio result. Under the condition of ice rain or freezing, the sensor can continuously and automatically detect the icing thickness of suspended power transmission lines, pylons, buildings, equipment surfaces, branches, etc.

A combined touch sensor and light-emitting-diode (LED) driver comprises a touch sensor circuit configured to detect a touch, where the touch sensor circuit is coupled to a common node and configured to operate with a first operating voltage, an LED driver circuit configured to drive an LED if the LED is coupled to the common node, where the LED driver circuit is also coupled to the common node and configured to operate with a second operating voltage is higher than the first operating voltage, and an n-type field effect transistor (FET) connected in series between the common node and the touch sensor. The n-type FET prevents the higher operating voltage of the LED driver from affecting the operation of the touch sensor, when a port of the combined touch sensor and LED driver IC is used to drive an LED. The touch sensor may be a capacitance-to-digital converter.

A capacitive-to-digital converter is provided which includes: sensor, offset and reference capacitors, an integrator circuit and a demodulation circuit. The sensor capacitor is switched according to a first clock and the offset capacitor according to a second clock, which has a higher switching frequency. The reference capacitor is switched according to a return signal from the converter's output. The integrator circuit includes an integrator capacitor, and has first and second nodes, with the sensor, offset and reference capacitors each being switched to the first and second nodes based on the respective first clock, second clock or return signal. The demodulation circuit receives and converts output of the integrator circuit into a digital output. The higher frequency clocking of the offset capacitor allows for a reduction in capacitance of the offset, reference or integrator capacitor, and the multiclocking of the converter allows for use of a multireferencing to the sensor capacitor.

The invention discloses a liquid level induction device, a biochemical analyzer and a liquid level induction method. The liquid level induction device comprises a sampling probe, a capacitance-to-digital converter and a signal processing device. The capacitance-to-digital converter is used for detecting a capacitance of the sampling probe and converting the capacitance to a digital value to be output, and the signal processing device is used for receiving the digital value, determining whether the sampling probe makes contact with a liquid level or not according to the digital value and outputting a liquid level induction signal to a motor control unit when it is determined that the sampling probe makes contact with the liquid level. Due to the fact that the only one capacitance-to-digital converter is adopted for replacing a converting circuit in the prior art, the problem that a simulation link is long and poor in interference rejection can be effectively solved, the circuit can be simplified, external disturbance can be lowered, and the reliability of the liquid level induction signal can be improved.

An energy-efficient capacitance-to-digital converter (CDC) is provided that utilizes a capacitance-domain successive approximation (SAR) technique. Unlike SAR analog-to-digital converters (ADCs), analysis shows that for SAR CDCs, the comparator offset voltage will result in signal-dependent and parasitic-dependent conversion errors, which necessitates an op-amp-based implementation. The inverter-based SAR CDC contemplated herein provides robust, energy-efficient, and fast operation. The inverter-based SAR CDC may include a hybrid coarse-fine programmable capacitor array. The design of example embodiments is insensitive to analog references, and thus achieves very low temperature sensitivity without the need for calibration. Moreover, this design achieves improved energy efficiency.

A capacitance-to-digital converter circuit s a capacitor bridge circuit to sense a difference in capacitance between sense capacitors and fixed capacitors in the bridge circuit. The sense capacitors vary according to a sensed parameter. Auxiliary capacitor digital to analog converters (DACs) are coupled to the capacitor bridge circuit to cancel the sensed difference. An analog to digital converter (ADC) receives a signal generated by the capacitor bridge circuit and the auxiliary capacitor DACs and converts the received signal to a digital signal. A digital accumulator accumulates the ADC output, whose output represents the difference in capacitance between the sense capacitors and the fixed capacitors. The accumulator output is used to control the auxiliary capacitor DACs to offset the difference in capacitance between the sense capacitors and the fixed capacitors. The accumulator output also provides the basis for the capacitance-to-digital circuit output.

A capacitance temperature ice coating thickness sensor belongs to the field of automated testing technology, characterized by that a capacitance value test circuit is composed of a single-chip inside the sensor, a single-path capacitance digital converter and medium ice or air to be detected filled between polar plates, a group of parallel polar plate testing capacitor arranged with fixed staff scale space, and a two-way programmable control scale gate circuit of each input end connected with each polar plate of the parallel polar plate testing capacitor orderly, and a common output end connected with a signal input end of the capacitance digital converter; a temperature test circuit is composed of the inner single-chip of the sensor and a semiconductor integrated digital temperature sensor sealed in a metal heat-conducting housing; the sensor is capable of undergoing fixed-point continuous automatic test of the ice coating thickness of a suspending transmission line, a fixed gantry of a high voltage transmission line, a building or surface of various static or mobile equipment, a suspending bracket, a branch, etc. in ice rain or freezing condition.

The present invention belongs to the technical field of sensors, and provides a temperature sensor based on a capacitance-to-digital-converter. The temperature sensor comprises: a sensor front-end circuit configured to generate first temperature variation signals, second temperature variation signals and third temperature variation signals according to temperature variation amount; a CDC reading circuit connected with the sensor front-end circuit and configured to generate digital codes according to the first temperature variation signals, the second temperature variation signals and the thirdtemperature variation signals; and a digital processing circuit connected with the CDC reading circuit and configured to output the digital codes. The temperature sensor based on the capacitance-to-digital-converter can effectively solve the problems that the CDC reading circuit is too complex in structure, low in practicality and large in temperature detection error in a current temperature sensor.

The invention provides a detecting method of a capacitive temperature sensor belonging to the technical field of automatic detection, characterized in that the sensor comprises a capacitance detection loop composed of an interior SCM, a digital simplex capacitance commutator, a group of parallel-plate detection capacitors arranged at a fixed interval with a target medium, such as ice or air, filled therebetween, and a duplex gate circuit with a programmably controllable scale having input ends sequentially connected with the plates of the parallel-plate detection capacitor and a common output end connected with a signal input end of the digital capacitance commutator; and a temperature detection loop composed of the interior SCM and a semiconductor integrated digital temperature sensor sealed within a metallic conductive housing. The sensor realizes fixed-point continuous automatic detection of thickness of icing on overhead power cables, fixing towers for high-voltage power cables, surfaces of buildings or stationary/mobile facilities, aerial brackets, and branches of trees under the condition of ice rain or frost.

Method and system are provided for evaluating linearity of a capacitive-to-digital converter (CDC) of a capacitive sensor integrated circuit chip. The evaluating employs multiple test capacitors, which may be on-chip with the CDC, and includes: obtaining capacitance values for the multiple test capacitors and parasitic capacitances of a first input A and a second input B to the capacitive-to-digital converter; applying the multiple test capacitors in multiple permutations to the first input A and the second input B, and for each of at least some permutations, determining an error between an expected output of the CDC using the obtained capacitance values and an actual measured output of the CDC; and determining linearity error for the CDC using the determined errors for the permutations of applying the multiple test capacitors to the first input A and the second input B of the CDC.

The invention discloses a wafer-level capacitive acceleration meter automatic testing system comprising a microprocessor, a host computer connected with the microprocessor, four capacitive digital converters, a first digital-to-analog converter, a second digital-to-analog converter, a first relay, and a second relay. The microprocessor controls the digital-to-analog converters and the relays, applies DC voltage to the two fixed electrodes of a capacitive acceleration meter at different time in order to generate electrostatic force and simulate external acceleration. The four capacitive digital converters are controlled by the microprocessor and transmit the capacitance values, acquired at different time, of the capacitive acceleration meter to the microprocessor. A capacitance change value is calculated by the microprocessor. The wafer-level capacitive acceleration meter automatic testing system achieves a purpose of testing a parameter and determines the quality of the capacitive acceleration meter.

The invention discloses a capacitance-to-digital converter for eliminating parasitic based on SAR logic, belongs to a new generation information technology, and aims to solve the problem that the overall performance of a capacitance-to-digital converter in the prior art is insufficient. Cycle-by-cycle compensation is conducted through a parasitic compensation current source array, and the parasitic capacitance influence of a measurement channel can be eliminated. By realizing the conversion from capacitance change to continuous time, the limitation of the traditional C/V structure is overcome,and the capacitance detection range is improved. A two-stage TDC quantization structure is adopted, the contradiction between the capacitance detection range and the detection precision is overcome,and high-dynamic-range and high-precision capacitance detection is achieved. Except a front-end CT conversion circuit, other circuits are all digital circuits, and the area and the power consumption are optimized. Therefore, the method can be widely applied to capacitance detection and sensing in a complex environment, and is suitable for highly integrated sensing circuits.

The invention relates to a suspension wire variable stiffness micro-nano probe which comprises a probe, a measuring rod, an intermediate connector, a capacitor upper plate, a capacitor lower plate, annular memory alloy, a piezoelectric ceramic chip, a fixation base, a suspension wire, a dynamic platform, a capacitor digital converter and an industrial personal computer. The intermediate connectoris fixed at the center of the dynamic platform through the suspension wire. The annular memory alloy is fixed on the dynamic platform through a screw. One end of the suspension wire is connected withthe intermediate connector, and the other end is connected with the annular memory alloy. The fixation base is fixedly welded on the dynamic platform. The piezoelectric ceramic chip is fixed between the annular memory alloy and the fixation base. The measuring rod is arranged at the center of the intermediate connector. According to the invention, the piezoelectric effect of the piezoelectric ceramic chip generates lateral pressure on the annular memory alloy to deform the annular structure, so as to change the degree of tension of the suspension wire; and the rigidity and the sensitivity of asuspension mechanism are further changed, so as to satisfy the measurement requirement of a workpiece under different working conditions.

The invention relates to earphones with sensors. The invention discloses an electronic device, such as an earphone may have sensor circuitry. The sensor circuitry may include optical proximity sensorsand capacitive sensor circuitry. An ear support structure such as an ear hook may be used to hold the earphone adjacent to an ear of a user. In this position, a speaker in the earphone may be used topresent audio to the user. The ear hook may be formed from an insulating elastomeric polymer. A stainless steel wire or other bendable structural support member may be embedded within the elastomericpolymer. The bendable member may hold the ear hook in a desired bent shape after bending by the user. The capacitive sensor circuitry may include one or more capacitive sensor electrodes coupled to capacitance-to-digital converter circuitry. Control circuitry may activate the optical proximity sensors in response to detection of a capacitance to confirm that the earphone is being worn.

The invention discloses an output measuring circuit of a capacitance-typed differential pressure sensor. The output measuring circuit comprises a switch unit and a sub capacitance measuring circuit, wherein, the sub capacitance measuring circuit comprises at least a digital capacitance converter that comprises a high-frequency signal output end and at least two signal input ends, one end of a capacitance C2 that is corresponding to negative cavity pressure of the sensor is serially connected with the switch unit and then connected with one of the signal input ends, one end of the other capacitance C1 that is corresponding to positive cavity pressure of the sensor is connected with the other signal input end, and the other ends of the capacitances C1 and C2 are mutually connected and then connected with the high-frequency signal output end. The digital capacitance converter is used for measuring the electric capacity difference Delta C between the measured capacitances C1 and C2 when the switch unit is on and measuring the electric capacity of the single capacitance C1 when the switch unit is off, the electric capacity value of C1 plus C2 is obtained by subtracting two times of the value of C1 with Delta C, and result of Delta C divided by the value of C1 plus C2 is calculated, thus obtaining the sensor output quantity that is proportional to the pressure difference. The invention further provides a corresponding measuring method.

The invention discloses a composite insulator icing growth monitoring system based on a capacitance effect. The composite insulator icing growth monitoring system comprises a microprocessor and is characterized in that a relay set, a sigma-delta capacitor digital convertor, an A/D convertor, a photoelectric isolation circuit, an RS485 circuit, a storage module, a watchdog, a communication module and a power management module are connected to the microprocessor, an insulator icing sensor is connected to the relay set, a tension sensor is connected to the A/D convertor, the tension sensor is connected with the insulator icing sensor, and the power management module is further connected with the communication module. The composite insulator icing growth monitoring system is capable of achieving the online monitoring of power transmission line icing and the like and providing reference for power transmission line intelligent management.

The invention relates to a capacitive sensor detection method based on Sigma-Delta modulation, which adopts an inductive capacitance, a capacitance-to-digital converter, a digital decimation filter and a time sequence control circuit. The inductive capacitance is connected with the capacitance-to-digital digital converter; the digital decimation filter is connected with the capacitance-to-digitaldigital converter; the time sequence control circuit is respectively connected with the capacitance-to-digital digital converter and the digital decimation filter; the capacitance-to-digital digital converter adopts a Sigma-Delta modulator; and the capacitance-to-digital digital converter converts a variation of the inductive capacitance into a charge signal, Sigma-Delta modulation is carried outon the charge signal, digital code stream is output, and the digital decimation filter carries out filtering and downsampling processing on the digital code stream, and a digital value for representing the inductive capacitance is output. According to the invention, the three-order Sigma-Delta modulator is used as a capacitance reading circuit, a to-be-measured capacitance is directly used as an input capacitance of the modulator, direct conversion from capacitance to digital is implemented, a compensation capacitance is adopted, consumption of an additional dynamic range of the Sigma-Delta modulator is reduced, power consumption is reduced, and a capacitance measurement range is expanded.